VRC7: Difference between revisions

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(→‎Mirroring Control ($E000): http://forums.nesdev.com/viewtopic.php?p=428#p428 claims there's more bits here?)
(use same denser presentation of chr banks as on VRC6 and Namco 163)
Line 38: Line 38:
   || ||||
   || ||||
   ++-++++- Select 8 KB PRG ROM at $A000
   ++-++++- Select 8 KB PRG ROM at $A000


=== PRG Select 2 ($9000) ===
=== PRG Select 2 ($9000) ===
Line 48: Line 47:
   ++-++++- Select 8 KB PRG ROM at $C000
   ++-++++- Select 8 KB PRG ROM at $C000


 
=== CHR Select 0…7 ($A000…$DFFF) ===
=== CHR Select 0 ($A000) ===
{| class="wikitable"
 
! Write to CPU address !! 1KB CHR bank affected
7  bit  0
|-
---------
| $A000 || $0000-$03FF
CCCC CCCC
|-
|||| ||||
| $A008 or $A010 || $0400-$07FF
++++-++++- Select 1 KB CHR ROM/RAM at PPU $0000
|-
 
| $B000 || $0800-$0BFF
 
|-
=== CHR Select 1 ($A010, $A008) ===
| $B008 or $B010 || $0C00-$0FFF
 
|-
7  bit  0
| $C000 || $1000-$13FF
---------
|-
CCCC CCCC
| $C008 or $C010 || $1400-$17FF
|||| ||||
|-
++++-++++- Select 1 KB CHR ROM/RAM at PPU $0400
| $D000 || $1800-$1BFF
 
|-
=== CHR Select 2 ($B000) ===
| $D008 or $D010 || $1C00-$1FFF
 
|}
7  bit  0
---------
CCCC CCCC
|||| ||||
++++-++++- Select 1 KB CHR ROM/RAM at PPU $0800
 
=== CHR Select 3 ($B010, $B008) ===
 
7  bit  0
---------
CCCC CCCC
|||| ||||
++++-++++- Select 1 KB CHR ROM/RAM at PPU $0C00
 
 
=== CHR Select 4 ($C000) ===
 
7  bit  0
---------
CCCC CCCC
|||| ||||
++++-++++- Select 1 KB CHR ROM/RAM at PPU $1000
 
 
=== CHR Select 5 ($C010, $C008) ===
 
7  bit  0
---------
CCCC CCCC
|||| ||||
++++-++++- Select 1 KB CHR ROM/RAM at PPU $1400
 
=== CHR Select 6 ($D000) ===
 
7  bit  0
---------
CCCC CCCC
|||| ||||
++++-++++- Select 1 KB CHR ROM/RAM at PPU $1800
 
=== CHR Select 7 ($D010, $D008) ===
 
7  bit  0
---------
CCCC CCCC
|||| ||||
++++-++++- Select 1 KB CHR ROM/RAM at PPU $1C00
 


=== Mirroring Control ($E000) ===
=== Mirroring Control ($E000) ===

Revision as of 03:00, 28 September 2013

The Konami VRC7 is an ASIC mapper. In the iNES format, it's #85.


Overview

  • Manufacturer: Konami
  • PRG ROM size: Up to 512 KB
  • PRG ROM bank size: 8 KB at $8000, $A000, and $C000
  • PRG RAM: Up to 8 KB
  • CHR capacity: Up to 256 KB (only two games released: one has 128 KB ROM, the other has 8 KB RAM)
  • CHR bank size: 1 KB - swappable even when RAM instead of ROM
  • Nametable mirroring: Controlled by mapper
  • Subject to bus conflicts: No

See VRC7 pinout for chip pinout.

Registers

One wiring variant of the VRC7 uses A4 for registers ($x010), the other uses A3 ($x008). Although A5 is wired for sound registers on both ($x030, $x028), in the latter board the ceramic resonator believed necessary for the sound hardware to work is missing.

PRG Select 0 ($8000)

7  bit  0
---------
..PP PPPP
  || ||||
  ++-++++- Select 8 KB PRG ROM at $8000


PRG Select 1 ($8010, $8008)

7  bit  0
---------
..PP PPPP
  || ||||
  ++-++++- Select 8 KB PRG ROM at $A000

PRG Select 2 ($9000)

7  bit  0
---------
..PP PPPP
  || ||||
  ++-++++- Select 8 KB PRG ROM at $C000

CHR Select 0…7 ($A000…$DFFF)

Write to CPU address 1KB CHR bank affected
$A000 $0000-$03FF
$A008 or $A010 $0400-$07FF
$B000 $0800-$0BFF
$B008 or $B010 $0C00-$0FFF
$C000 $1000-$13FF
$C008 or $C010 $1400-$17FF
$D000 $1800-$1BFF
$D008 or $D010 $1C00-$1FFF

Mirroring Control ($E000)

7  bit  0
---------
E... ..MM
|      ||
|      ++- Mirroring (0: vertical; 1: horizontal;
|                         2: one-screen, lower bank; 3: one-screen, upper bank)
+--------- WRAM enable (1: enable WRAM, 0: protect)

IRQ Control ($E008 - $F010)

$E008, $E010:  IRQ Latch
       $F000:  IRQ Control
$F008, $F010:  IRQ Acknowledge

Many VRC mappers use the same IRQ system. For details on IRQ operation, see VRC IRQs.

Sound ($9010, $9030)

For details on sound information, see VRC7 Audio.