PowerPak Menu

From NESdev Wiki
Jump to navigationJump to search

The PowerPak boot ROM and menu system use its own simple mapper. The PowerPak menu is split into a series of modules that reside at $0400-$07FF in the NES's built-in RAM and are loaded from the CF card. After booting, the module "I.MAP" is loaded and run.


Modules are switched between by writing the filename to fileEntry (usually a single character, calling ClearFindEntry beforehand if it's not already cleared), then calling CardLoadModule. Source for all modules is located here.

  • A.MAP (Auto) - checks a "saves" directory for a save with the same name as the ROM being loaded
  • B.MAP (Battery) - save selection screen
  • D.MAP (Disk?) - FDS save selection screen
  • E.MAP (Error) - displays "Bad File Header"
  • F.MAP (FDS) - attempts to load an "FDSBIOS.BIN" from the PowerPak directory into WRAM, then starts an FDS game
  • G.MAP (Game Genie) - Game Genie .txt file selection screen
  • I.MAP (Initial?) - title screen
  • L.MAP (Last) - saves the game name to LASTNES.TXT in the PowerPak directory, also loads appropriate iNES mapper file based on header
  • M.MAP (Music) - loads an NSF and the NSF player, and starts the NSF
  • N.MAP (?) - ROM selection screen
  • O.MAP (Options) - game options screen, with Game Genie code entering and save loading
  • Q.MAP (Question) - "save to CF card?" screen
  • S.MAP (Save) - writes a save to the CF card


  • PPU $0000-$1FFF: 8 KB switchable CHR RAM bank.
  • CPU $6000-$7FFF: 8 KB switchable PRG RAM bank, selects from the 512 KB "PRG ROM" space.
  • CPU $8000-$BFFF: 16 KB switchable PRG ROM bank, selects from boot ROM.
  • CPU $C000-$FFFF: 16 KB PRG ROM bank, fixed to the last bank of boot ROM.


FPGADATA ($5000)

The boot ROM writes $FF to this register. It tells the FPGA it is being reprogrammed.


7  bit  0
---- ----
|||| ||||
++++-++++- Writes a byte of configuration to the FPGA.

MAPPERWR ($8000)

7  bit  0
---- ----
.... ..DD
       ++- Selects the bank of boot ROM that appears at $8000-$BFFF.

Banks 0, 1 and 2 contain the initial FPGA configuration. Bank 3 contains 8KB of font and then 8KB of system routines. As the last 16KB are also accessible via the fixed bank, the $8000-$BFFF area isn't useful for menu software.

PRGBANK ($4200)

7  bit  0
---- ----
|||| ||||
||++-++++- Selects the bank of PRG RAM that appears in $6000-$7FFF.
|+-------- Enable CHR RAM writing if 1.
+--------- Selects from 32KB of WRAM instead of main PRG RAM.

CHRBANK ($4201)

7  bit  0
---- ----
  || ||||
  ++-++++- Selects the bank of CHR RAM used.