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| [[Category:ASIC mappers]] | | #REDIRECT [[VRC2 and VRC4]] |
| The Konami VRC4 is an [[:Category:ASIC mappers|ASIC]] [[MMC|mapper]].
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| __TOC__
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| == Overview ==
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| * PRG ROM size: Up to 256 KB
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| * PRG ROM bank size: 8 KB at $A000, and $8000 OR $C000
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| * PRG RAM: Up to 8 KB
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| * CHR bank size: 1 KB
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| * Nametable [[mirroring]]: Controlled by mapper
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| * Subject to [[bus conflict]]s: No
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| The Konami VRC4 is almost identical to the [[VRC2|VRC2]], but with a bit more capabilities, such as the option to swap PRG at $C000 instead of $8000 and an IRQ counter.
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| See [[VRC4 pinout]] for chip pinout.
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| == Revisions ==
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| This mapper has been used with several board revisions, each of which uses different address lines.
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| All boards use A15-A12 the same way, along with two lines from A7-A0.
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| Here is a listing of known revisions, which address lines are used, and which [[iNES]] mapper number is used to represent it:
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| variant lines registers iNES Mapper Number
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| ----------------------------------------------------------------------
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| VRC4a: A1, A2 $x000, $x002, $x004, $x006 [[INES Mapper 021|021]]
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| VRC4b: A1, A0 $x000, $x002, $x001, $x003 025
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| VRC4c: A6, A7 $x000, $x040, $x080, $x0C0 021
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| VRC4d: A3, A2 $x000, $x008, $x004, $x00C 025
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| VRC4e: A2, A3 $x000, $x004, $x008, $x00C 023
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| Some variants that use the same address lines use them in different ways. For example, VRC4d and VRC4e both use A2 and A3, however VRC4d has them reversed.
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| For historical reasons, some variants share a mapper number.
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| These may be detected with a hash of the PRG ROM, or the address lines used may be expressed in NES 2.0 with [[NES 2.0 submappers#VRC4|submappers]].
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| This page lists registers as they are in the VRC4a variant. For other variants, you can use the diagram above for determining which registers are used.
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| == Registers ==
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| === PRG Swap Mode control ($9004, $9006) ===
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| 7 bit 0
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| ---------
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| .... ..M.
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| +-- Swap Mode
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| When 'M' is clear:
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| * the 8 KB page at $8000 is controlled by the $800x register
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| * the 8 KB page at $C000 is fixed to the second last 8 KB in the ROM
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| When 'M' is set:
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| * the 8 KB page at $8000 is fixed to the second last 8 KB in the ROM
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| * the 8 KB page at $C000 is controlled by the $800x register
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| === PRG Select 0 ($8000, $8002, $8004, $8006) ===
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| 7 bit 0
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| ---------
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| ...P PPPP
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| +-++++- Select 8 KB PRG bank at $8000 or $C000 depending on Swap Mode
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| === PRG Select 1 ($A000, $A002, $A004, $A006) ===
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| 7 bit 0
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| ---------
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| ...P PPPP
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| +-++++- Select 8 KB PRG bank at $A000
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| === Mirroring Control ($9000, $9002) ===
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| 7 bit 0
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| ---------
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| .... ..MM
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| ||
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| ++- [[Mirroring]] (0: vertical; 1: horizontal;
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| 2: one-screen, lower bank; 3: one-screen, upper bank;)
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| === CHR Select 0 ($B000 + $B002) ===
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| $B000 $B002
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| 7 bit 0 7 bit 0
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| --------- ---------
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| .... LLLL .... HHHH
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| |||| ||||
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| |||| ++++- High 4-bits of 1 KB CHR bank at PPU $0000
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| ++++-------------- Low 4-bits
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| === CHR Select 1 ($B004 + $B006) ===
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| $B004 $B006
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| 7 bit 0 7 bit 0
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| --------- ---------
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| .... LLLL .... HHHH
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| |||| ||||
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| |||| ++++- High 4-bits of 1 KB CHR bank at PPU $0400
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| ++++-------------- Low 4-bits
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| === CHR Select 2 ($C000 + $C002) ===
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| $C000 $C002
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| 7 bit 0 7 bit 0
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| --------- ---------
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| .... LLLL .... HHHH
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| |||| ||||
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| |||| ++++- High 4-bits of 1 KB CHR bank at PPU $0800
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| ++++-------------- Low 4-bits
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| === CHR Select 3 ($C004 + $C006) ===
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| $C004 $C006
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| 7 bit 0 7 bit 0
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| --------- ---------
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| .... LLLL .... HHHH
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| |||| ||||
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| |||| ++++- High 4-bits of 1 KB CHR bank at PPU $0C00
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| ++++-------------- Low 4-bits
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| === CHR Select 4 ($D000 + $D002) ===
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| $D000 $D002
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| 7 bit 0 7 bit 0
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| --------- ---------
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| .... LLLL .... HHHH
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| |||| ||||
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| |||| ++++- High 4-bits of 1 KB CHR bank at PPU $1000
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| ++++-------------- Low 4-bits
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| === CHR Select 5 ($D004 + $D006) ===
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| $D004 $D006
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| 7 bit 0 7 bit 0
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| --------- ---------
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| .... LLLL .... HHHH
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| |||| ||||
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| |||| ++++- High 4-bits of 1 KB CHR bank at PPU $1400
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| ++++-------------- Low 4-bits
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| === CHR Select 6 ($E000 + $E002) ===
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| $E000 $E002
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| 7 bit 0 7 bit 0
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| --------- ---------
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| .... LLLL .... HHHH
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| |||| ++++- High 4-bits of 1 KB CHR bank at PPU $1800
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| ++++-------------- Low 4-bits
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| === CHR Select 7 ($E004 + $E006) ===
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| $E004 $E006
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| 7 bit 0 7 bit 0
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| --------- ---------
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| .... LLLL .... HHHH
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| |||| ||||
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| |||| ++++- High 4-bits of 1 KB CHR bank at PPU $1C00
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| ++++-------------- Low 4-bits
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| === IRQ Control ($F00x) ===
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| <pre>
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| $F000: IRQ Latch, low 4 bits
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| $F002: IRQ Latch, high 4 bits
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| $F004: IRQ Control
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| $F006: IRQ Acknowledge
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| </pre>
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| Many VRC mappers use the same IRQ system. For details on IRQ operation, see [[VRC IRQ]]s.
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