CPU: Difference between revisions

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(→‎Note: Frequency table, including famiclone)
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=== Note ===  
=== Note ===  
* The CPU's clock is obtained by dividing a 21.477272 MHz clock source by 12 (26.601712 MHz divided by 16 for PAL).  
The CPU generates its clock signal by dividing the master clock signal.
{| border="1"
|-
! Rate || NTSC NES/Famicom || PAL NES || PAL Famiclone
|-
| Color subcarrier frequency ''f<sub>s</sub>'' (exact) || 39375000/11 Hz || 4433618.75 Hz || 4433618.75 Hz
|-
| Color subcarrier frequency ''f<sub>s</sub>'' (approx) || 3.579545 MHz || 4.433619 MHz || 4.433619 MHz
|-
| Master clock frequency 6''f<sub>s</sub>'' || 21.477272 MHz || 26.601712 MHz || 26.601712 MHz
|-
| Clock divisor ''d'' || 12 || 16 || 15
|-
| CPU clock frequency 6''f<sub>s</sub>''/''d'' || 1.789773 MHz || 1.662607 MHz || 1.773448 MHz
|}
* Kevtris has confirmed that all illegal 6502 opcodes execute identically on the 2A03/2A07. He has even went as far as to integrate them into the CopyNES BIOS.
* Kevtris has confirmed that all illegal 6502 opcodes execute identically on the 2A03/2A07. He has even went as far as to integrate them into the CopyNES BIOS.
* The cpu pinout is located in the [[Hardware_pinout|hardware pinout]] section [[CPU_pin_out_and_signal_description|here]]
* The CPU pinout is located in the [[Hardware_pinout|hardware pinout]] section [[CPU_pin_out_and_signal_description|here]]
* For the CPU instruction list, please refer to this [[CPU_INSTRUCTION_LIST|section]].
* For the CPU instruction list, please refer to this [[CPU_INSTRUCTION_LIST|section]].
<noinclude>
<noinclude>
* A printer friendly version covering all section is available [[CPU_ALL|here]].
* A printer friendly version covering all section is available [[CPU_ALL|here]].
</noinclude>
</noinclude>

Revision as of 16:21, 8 October 2009

The NES CPU core is based on the 6502 processor and runs at approximately 1.79 MHz (1.66 MHz in a PAL NES). It is made by Ricoh and lacks the MOS6502's decimal mode. In the NTSC NES, the RP2A03 chip contains the CPU and APU; in the PAL NES, the CPU and APU are contained within the RP2A07 chip.


Section


Note

The CPU generates its clock signal by dividing the master clock signal.

Rate NTSC NES/Famicom PAL NES PAL Famiclone
Color subcarrier frequency fs (exact) 39375000/11 Hz 4433618.75 Hz 4433618.75 Hz
Color subcarrier frequency fs (approx) 3.579545 MHz 4.433619 MHz 4.433619 MHz
Master clock frequency 6fs 21.477272 MHz 26.601712 MHz 26.601712 MHz
Clock divisor d 12 16 15
CPU clock frequency 6fs/d 1.789773 MHz 1.662607 MHz 1.773448 MHz
  • Kevtris has confirmed that all illegal 6502 opcodes execute identically on the 2A03/2A07. He has even went as far as to integrate them into the CopyNES BIOS.
  • The CPU pinout is located in the hardware pinout section here
  • For the CPU instruction list, please refer to this section.
  • A printer friendly version covering all section is available here.