INES Mapper 243: Difference between revisions

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(There's a term on the mirroring page for the odd mode that %10 produces)
(incorporate information from nestopia source and Санчез.)
Line 1: Line 1:
[[Category:iNES Mappers|243]][[Category:Mappers using $4020-$5FFF|243]]
[[Category:iNES Mappers|243]][[Category:Mappers using $4020-$5FFF|243]]
  Based on Disch's original notes: 
[[iNES Mapper 243]] describes Sachen's [[Sachen 74LS374N pinout|“74LS374N” mapper IC]], which in no way resembles its namesake.
  ========================
 
  =  Mapper 243          =
Unfortunately, it seems that there are several different ways this board was wired. Submappers may need to be allocated.
  ========================
 
 
The IC, as described by Санчез, and also as exists in GoodNES, does not have any games with more than 64KiB PRG, so it's unclear why Nestopia or Санчез specify three bits for PRG banking.
    
    
   Example Games:
   Example Games:
Line 10: Line 10:
   Honey
   Honey
   Poker III 5-in-1
   Poker III 5-in-1
 
    
    
   Registers:
   Registers:
   ---------------------------
   ---------------------------
 
   Range,Mask:  $4100-7FFF, $4101
   Range,Mask:  $4020-4FFF, $4101
    
    
     $4100:  [.... .AAA]  Address for use with $4101
     $4100:  [.... .AAA]  Address for use with $4101
    
    
  Variant one (Nestopia "374b", also what Санчез specified) :
     $4101:  Data port
     $4101:  Data port
       R:2 -> [.... ...H]  High bit of CHR reg
       R:2 -> [.... ...B]  High bit of CHR reg AND ALSO sets PRG reg to B.
       R:4 -> [.... ...LLow bit of CHR reg
       R:4 -> [.... ...CMiddle bit of CHR reg
       R:5 -> [.... .PPP]  PRG reg  (32k @ $8000)
       R:5 -> [.... .PPP]  PRG reg  (32k @ $8000)
       R:6 -> [.... ..DDMiddle bits of CHR reg
       R:6 -> [.... ..DELow bits of CHR reg
       R:7 -> [.... .MM.]  Mirroring
       R:7 -> [.... .MM.]  Mirroring
           %00 = Horz
           %00 = Horz
           %01 = Vert
           %01 = Vert
           %10 = L-shaped; see below
           %10 = L-shaped; see below
           %11 = 1ScB
           %11 = 1ScA
    Nestopia asserts that both addresses are readable and return the inverted value of AAA, or possibly with the LSB not inverted.
    
    
  Variant two (Nestopia "374a") :
    $4101:  Data port
      R:0 -> [.... ....]  Writes reset CHR bank to 3 and PRG bank to 0
      R:2 -> [.... ...B]  High bit of CHR reg
      R:4 -> [.... ...E]  Low bit of CHR reg
      R:5 -> [.... ...P]  PRG reg  (32k @ $8000)
      R:6 -> [.... ..CD]  Middle bits of CHR reg
      R:7 -> [.... ...M]  Mirroring
            0 = Horz
            1 = Vert
    
    
   Mirroring:
   Mirroring:
   ---------------------------
   ---------------------------
 
   Mirroring mode %10 is not quite 1ScB:
   Mirroring mode %10 is not quite 1ScB:
 
     [  NTA  ][  NTB  ]
     [  NTA  ][  NTB  ]
     [  NTB  ][  NTB  ]
     [  NTB  ][  NTB  ]
 
    
    
   CHR Setup:
   CHR Setup:
   ---------------------------
   ---------------------------
 
   8k CHR page @ $0000 is selected according to some permutation of the BCDE bits.
   8k CHR page @ $0000 is selected by the given 4 bit CHR page number ('HDDL')
 
Reference: Санчез ( http://cah4e3.shedevr.org.ru/%5Blst%5D-sachen-mappers.txt ), [https://github.com/rdanbrook/nestopia/blob/master/source/core/board/NstBoardSachen74x374.cpp Nestopia's source]

Revision as of 06:53, 1 February 2014

iNES Mapper 243 describes Sachen's “74LS374N” mapper IC, which in no way resembles its namesake.

Unfortunately, it seems that there are several different ways this board was wired. Submappers may need to be allocated.

The IC, as described by Санчез, and also as exists in GoodNES, does not have any games with more than 64KiB PRG, so it's unclear why Nestopia or Санчез specify three bits for PRG banking.

 Example Games:
 --------------------------
 Honey
 Poker III 5-in-1
 
 Registers:
 ---------------------------
 Range,Mask:   $4100-7FFF, $4101
 
   $4100:  [.... .AAA]   Address for use with $4101
 
 Variant one (Nestopia "374b", also what Санчез specified) :
   $4101:   Data port
      R:2 -> [.... ...B]  High bit of CHR reg AND ALSO sets PRG reg to B.
      R:4 -> [.... ...C]  Middle bit of CHR reg
      R:5 -> [.... .PPP]  PRG reg  (32k @ $8000)
      R:6 -> [.... ..DE]  Low bits of CHR reg
      R:7 -> [.... .MM.]  Mirroring
          %00 = Horz
          %01 = Vert
          %10 = L-shaped; see below
          %11 = 1ScA

    Nestopia asserts that both addresses are readable and return the inverted value of AAA, or possibly with the LSB not inverted.
 
  Variant two (Nestopia "374a") :
   $4101:   Data port
      R:0 -> [.... ....]  Writes reset CHR bank to 3 and PRG bank to 0
      R:2 -> [.... ...B]  High bit of CHR reg
      R:4 -> [.... ...E]  Low bit of CHR reg
      R:5 -> [.... ...P]  PRG reg  (32k @ $8000)
      R:6 -> [.... ..CD]  Middle bits of CHR reg
      R:7 -> [.... ...M]  Mirroring
           0 = Horz
           1 = Vert
 
 Mirroring:
 ---------------------------  
 Mirroring mode %10 is not quite 1ScB:
   [  NTA  ][  NTB  ]
   [  NTB  ][  NTB  ]
 
 CHR Setup:
 ---------------------------  
 8k CHR page @ $0000 is selected according to some permutation of the BCDE bits.

Reference: Санчез ( http://cah4e3.shedevr.org.ru/%5Blst%5D-sachen-mappers.txt ), Nestopia's source