User contributions for Ben Boldt

30 April 2024

• 23:4523:45, 30 April 2024 diff hist +270‎ m Famicom Network System ‎ "card" -> "tsuushin card", "NES" -> "Famicom". Added external links. current

22 April 2024

• 23:3823:38, 22 April 2024 diff hist +240‎ Talk:Family Computer Disk System ‎ →‎FDS current

2 April 2024

• 14:4814:48, 2 April 2024 diff hist +220‎ MMC5 ‎ →‎Scanline IRQ Status ($5204, read/write): Clarified that the scanline does not reset from a scanline interrupt. current
• 07:3907:39, 2 April 2024 diff hist +198‎ MMC5 ‎ →‎Scanline Detection and Scanline IRQ: updated a couple things having to do with scanline counter resetting.
• 07:2507:25, 2 April 2024 diff hist +353‎ MMC5 ‎ →‎PPU Data Substitution Enable ($2001 = PPUMASK): Added info about scanline counter.

30 March 2024

• 04:2804:28, 30 March 2024 diff hist +251‎ MMC5 ‎ →‎Internal extended RAM mode ($5104): Improved connection between PPU address and CPU address for extended RAM data.

29 March 2024

• 13:0513:05, 29 March 2024 diff hist +7‎ m MMC5 ‎ →‎Vertical Split Mode ($5200)
• 12:5912:59, 29 March 2024 diff hist +849‎ MMC5 ‎ →‎Vertical Split Mode ($5200): Improved description, fixed problems where I was saying that the MMC5 substitutes pattern data.

27 March 2024

• 03:4503:45, 27 March 2024 diff hist +89‎ m MMC5 ‎ →‎MMC5A
• 03:3703:37, 27 March 2024 diff hist +429‎ MMC5 ‎ →‎MMC5A Registers: Corrected errors related to register $5207.
• 00:3200:32, 27 March 2024 diff hist +7‎ m MMC5 ‎ →‎Nametable mapping ($5105)
• 00:1900:19, 27 March 2024 diff hist +759‎ MMC5 ‎ →‎Internal extended RAM mode ($5104): Updated description detailing what happens when assigning ExRAM as nametable when extended attributes are enabled.

26 March 2024

• 21:5821:58, 26 March 2024 diff hist +71‎ MMC5 ‎ →‎Scanline IRQ Status ($5204, read/write): Pin 92 low disables scanline IRQs.
• 21:5421:54, 26 March 2024 diff hist +355‎ MMC5 ‎ →‎8x16 PPU Sequence Monitoring Enable ($2001 = PPUMASK)
• 21:3521:35, 26 March 2024 diff hist +319‎ MMC5 ‎ →‎NES internal state monitoring: Corresponding update to description of $2001. I need to check if scanline IRQs get disabled this way as well.
• 21:2421:24, 26 March 2024 diff hist +135‎ MMC5 ‎ →‎Internal extended RAM mode ($5104): Added PPUMASK info for extended attribute mode.
• 21:2121:21, 26 March 2024 diff hist +101‎ MMC5 ‎ →‎Vertical Split Mode ($5200): I found that vertical split mode is disabled by PPUMASK monitoring, similar as 8x16 sprite mode.
• 02:2002:20, 26 March 2024 diff hist +115‎ MMC5 ‎ →‎Vertical Split Mode ($5200): More details, things that automatically disable split mode.
• 02:1402:14, 26 March 2024 diff hist +40‎ MMC5 ‎ →‎Vertical Split Mode ($5200): Pin 92 low disables split mode.
• 01:5301:53, 26 March 2024 diff hist +9‎ m MMC5 ‎ →‎Internal extended RAM mode ($5104)
• 01:5301:53, 26 March 2024 diff hist +346‎ MMC5 ‎ →‎Internal extended RAM mode ($5104): I must have goofed something up before because I absolutely am not getting nametable data to work in mode %11. Tested and added split mode info.

25 March 2024

• 22:1122:11, 25 March 2024 diff hist +474‎ m MMC5 ‎ →‎Vertical Split Mode ($5200): Additional cleanup.
• 21:0521:05, 25 March 2024 diff hist +411‎ MMC5 ‎ →‎Vertical Split Mode ($5200): Clarifications as I am reading and remembering how this works. No new information in this edit.
• 19:5419:54, 25 March 2024 diff hist +130‎ MMC5 ‎ →‎Fill-mode color ($5107): Fill mode color vs. pin 92 low when using extended attributes with fill mode.
• 19:4619:46, 25 March 2024 diff hist −278‎ MMC5 ‎ →‎Configuration: removed incorrect statements that were caused by a test setup issue. My test waited for in-frame before doing these writes, so the test itself got disabled with pin 92 low.
• 19:1219:12, 25 March 2024 diff hist +13‎ MMC5 ‎ →‎Internal extended RAM mode ($5104): additional note clarifying that extended ram writes via ppudata does not become available when pin 92 is driven low. I.e. pin 92 low is not just pretending to be in a different mode.
• 19:0619:06, 25 March 2024 diff hist +84‎ MMC5 ‎ →‎Internal extended RAM mode ($5104): pin 92 low prevents write access to $5C00
• 08:3508:35, 25 March 2024 diff hist +320‎ MMC5 ‎ →‎Fill-mode color ($5107): added more fill mode info.
• 04:1804:18, 25 March 2024 diff hist −4‎ m Talk:MMC5 ‎ →‎List of Mysteries: Pin 92 is known now.
• 03:2403:24, 25 March 2024 diff hist +201‎ MMC5 ‎ →‎Internal extended RAM mode ($5104): Writing during v-blank in modes 00,01 is not writing zeros for me. It either doesn’t write or it corrupts it.
• 02:2002:20, 25 March 2024 diff hist +41‎ MMC5 ‎ →‎Nametable mapping ($5105)
• 02:1502:15, 25 March 2024 diff hist 0‎ m MMC5 ‎ →‎Internal extended RAM mode ($5104)
• 02:1202:12, 25 March 2024 diff hist +466‎ MMC5 ‎ →‎Internal extended RAM mode ($5104): Details added for $5104 register. Testing revealed that mode 11 does work as a read-only nametable.
• 01:3601:36, 25 March 2024 diff hist +64‎ MMC5 ‎ →‎Scanline IRQ Status ($5204, read/write): pin 92 info
• 01:3301:33, 25 March 2024 diff hist +12‎ MMC5 pinout ‎ I found that driving pin 92 low makes the MMC5 think it is always out of frame. current

24 March 2024

• 21:1421:14, 24 March 2024 diff hist +137‎ MMC5 ‎ →‎Scanline IRQ Status ($5204, read/write): In-frame bit clarification. I think we knew this already but I did test to confirm the h-blank. I did a test program that reads $5204, ROL*3, write to $4016, then watched OUT0 with a scope.

16 January 2024

• 12:1612:16, 16 January 2024 diff hist +412‎ PPU attribute tables ‎ Added expansion section

31 December 2023

• 03:1603:16, 31 December 2023 diff hist 0‎ m MMC5 ‎ →‎PRG Bankswitching ($5113-$5117): Made example select ROM since 10 was larger than possible for RAM.

30 December 2023

• 00:3900:39, 30 December 2023 diff hist +6,269‎ MMC5 ‎ →‎PRG Bankswitching ($5113-$5117): Bankswitch register clarification. No new info; just trying to explain it better.

27 October 2022

• 03:4203:42, 27 October 2022 diff hist −254‎ m MMC5 ‎ →‎Scanline Detection and Scanline IRQ: Removed the last paragraph about reset detection, which was already explained farther up.

27 August 2022

• 16:3816:38, 27 August 2022 diff hist +22‎ m Famicom Network System ‎ →‎Data Bus Behavior: Added note, Kanji ROM /CE pin.

11 August 2022

• 17:5517:55, 11 August 2022 diff hist +607‎ Famicom Network System ‎ Removed unnecessary "1=" from yes/no table cell style templates. Added unknown/unconfirmed register $40A0 (placeholder).

9 August 2022

• 21:2121:21, 9 August 2022 diff hist −2‎ m MMC5 ‎ →‎Internal extended RAM mode ($5104): Removed unnecessary "1=" from table.
• 21:1921:19, 9 August 2022 diff hist −216‎ m VRC7 audio ‎ →‎Debug Mode: Remove unnecessary "1=" from table.
• 21:1721:17, 9 August 2022 diff hist −512‎ m Everdrive N8 ‎ →‎Mapper compatibility: Removed unnecessary "1=" from table.
• 21:1621:16, 9 August 2022 diff hist −512‎ m KrzysioCart ‎ →‎Mapper Compatibility: Removed unnecessary "1=" from table. current
• 21:1621:16, 9 August 2022 diff hist −512‎ m PowerPak ‎ →‎Offical Mappers V1.35b: Removed unnecessary "1=" from table.
• 21:1521:15, 9 August 2022 diff hist −512‎ m Everdrive N8 Pro ‎ →‎Mapper compatibility: Removed unnecessary "1=" from table. Not sure why I thought it needed that.

29 July 2022

• 18:1718:17, 29 July 2022 diff hist +1,751‎ Everdrive N8 Pro ‎ →‎Mapper compatibility: Colorized the mapper support table.
• 18:1618:16, 29 July 2022 diff hist +15‎ PowerPak ‎ →‎Offical Mappers V1.35b: Colorized the mapper support table.
• 18:1318:13, 29 July 2022 diff hist −907‎ KrzysioCart ‎ Added mappers 15 and 30 based on Krzysiobal's eBay page. Colorized the mapper compatibility table.
• 18:1318:13, 29 July 2022 diff hist +1,457‎ Everdrive N8 ‎ →‎Mapper compatibility: Colorized the mapper compatibility table.

12 July 2022

• 06:0306:03, 12 July 2022 diff hist +36‎ m Famicom Network System ‎ →‎Data Bus Behavior
• 05:5605:56, 12 July 2022 diff hist +150‎ Famicom Network System ‎ →‎Data Bus Behavior: expanded first row of table into 3 separate rows.
• 05:4105:41, 12 July 2022 diff hist +86‎ Famicom Network System ‎ →‎Data Bus Behavior: noted Kanji graphic ROM in table.

10 July 2022

• 20:4720:47, 10 July 2022 diff hist +21‎ m Famicom Network System ‎ →‎Data Bus Behavior: clarification
• 20:4220:42, 10 July 2022 diff hist −315‎ Famicom Network System ‎ Re-tested RF5C66 pins 41 and 42, and found that they are NOT mirrored at $Cxxx. Mystery solved. Not sure what I was seeing before.
• 15:4015:40, 10 July 2022 diff hist +482‎ Famicom Network System ‎ →‎Data Bus Behavior: added note about potential bus conflict.
• 02:1902:19, 10 July 2022 diff hist +348‎ Famicom Network System ‎ →‎Data Bus Behavior: Corrected error where I thought the card bus was driving $00 in blocked address ranges.
• 00:3300:33, 10 July 2022 diff hist −1‎ m Famicom Network System ‎ →‎Data Bus Behavior: typo fixes
• 00:2900:29, 10 July 2022 diff hist +234‎ Famicom Network System ‎ →‎Data Bus Behavior: Added note about $4xE0-4xEF.
• 00:1900:19, 10 July 2022 diff hist +1,140‎ Famicom Network System ‎ Added information about behavior of the data bus passing through the RF5C66.

27 June 2022

• 13:5813:58, 27 June 2022 diff hist −43‎ m MMC5 ‎ →‎Upper CHR Bank bits ($5130): cleanup
• 03:4403:44, 27 June 2022 diff hist −50‎ MMC5 ‎ →‎Fill-mode tile ($5106): I remembered asking about this in the forum. I updated this with what I learned there.
• 03:3203:32, 27 June 2022 diff hist +3‎ m MMC5 ‎ →‎Fill-mode color ($5107): fixed a typo
• 01:3101:31, 27 June 2022 diff hist +1,641‎ MMC5 ‎ Reorganized and clarified information about extended RAM mode.

22 June 2022

• 21:5521:55, 22 June 2022 diff hist −21‎ VRC IRQ ‎ →‎IRQ Control: Made a change that Quietrust discovered when analyzing the VRC7 decap. current
• 17:4317:43, 22 June 2022 diff hist +601‎ VRC7 pinout ‎ Added note about xtal loading caps, for anyone trying to mod TTA for expansion audio.

20 June 2022

• 20:1220:12, 20 June 2022 diff hist +679‎ VRC7 audio ‎ →‎Debug Mode: Added new information from SCSR.

17 June 2022

• 18:5418:54, 17 June 2022 diff hist 0‎ VRC7 audio ‎ →‎Debug Mode: Inverted pin 15 (/Debug) in the debug mode input table, per SCSR on discord.
• 18:1018:10, 17 June 2022 diff hist +257‎ VRC7 audio ‎ →‎Debug Mode: Added info about serial data from Discord.
• 16:4816:48, 17 June 2022 diff hist −24‎ m VRC7 audio ‎ →‎Debug Mode: Fixed silly mistake.
• 16:4616:46, 17 June 2022 diff hist +117‎ m VRC7 pinout ‎ Added "for more info" comment for Debug mode.
• 16:4016:40, 17 June 2022 diff hist +2,221‎ VRC7 audio ‎ Added debug mode information from SCSR on discord.
• 16:0116:01, 17 June 2022 diff hist +83‎ VRC7 pinout ‎ Added comment based on additional info from SCSR on discord.

16 June 2022

• 05:3605:36, 16 June 2022 diff hist +305‎ User talk:Lidnariq ‎No edit summary

4 May 2022

• 17:1017:10, 4 May 2022 diff hist +86‎ User talk:Fiskbit ‎No edit summary current
• 17:0917:09, 4 May 2022 diff hist +1,595‎ User talk:Fiskbit ‎ →‎Underlines in plain text: new section

11 April 2022

• 23:2423:24, 11 April 2022 diff hist 0‎ m List of NES music composers ‎No edit summary
• 23:2223:22, 11 April 2022 diff hist +21,464‎ List of NES music composers ‎ Migrated the data from http://nesdev.parodius.com/authors.htm, per the "to do".

8 April 2022

• 22:5722:57, 8 April 2022 diff hist +27‎ m Famicom Network System ‎ →‎CPU2 Known Registers: clarification
• 22:4622:46, 8 April 2022 diff hist +230‎ Famicom Network System ‎ →‎Known Registers: Improvement/clarification on register $40D6.

7 April 2022

• 18:1318:13, 7 April 2022 diff hist +107‎ MMC1 ‎ →‎Hardware: Added mention of MMC1B2F.

6 April 2022

• 16:3316:33, 6 April 2022 diff hist +1,199‎ List of NES music composers ‎ I put the composer as the first column. Added works by Nobuo Uematsu. Not sure if there is a better way to organize multiple games from the same composer. How about multiple composers for 1 game?

29 March 2022

• 19:3119:31, 29 March 2022 diff hist +883‎ Talk:Cartridge connector ‎ →‎Logic thresholds

27 March 2022

• 21:4521:45, 27 March 2022 diff hist +88‎ m Talk:Cartridge connector ‎ →‎Logic thresholds
• 21:4521:45, 27 March 2022 diff hist +265‎ Talk:Cartridge connector ‎ →‎Logic thresholds: new section
• 21:4021:40, 27 March 2022 diff hist +408‎ Cartridge connector ‎ Note/warning about pin pitch.

26 March 2022

• 20:5420:54, 26 March 2022 diff hist +422‎ Famicom ‎ →‎Differences from NES: Noted Famicom Titler specifically had the RGB PPU, and no other consoles that I am aware of. Expanded expansion audio info.

20 March 2022

• 20:1520:15, 20 March 2022 diff hist +435‎ Implementing Mappers In Hardware ‎ →‎74LVC245: More info about controlling DIR, /E
• 20:0220:02, 20 March 2022 diff hist +6,009‎ Implementing Mappers In Hardware ‎ Added information about level shifting. Removed baked-in section numbers, as these are generated automatically. Please improve it if you have anything to add or correct.

18 March 2022

• 19:1219:12, 18 March 2022 diff hist 0‎ m Implementing Mappers In Hardware ‎ →‎0. IC chips technologies
• 19:0619:06, 18 March 2022 diff hist +810‎ Implementing Mappers In Hardware ‎ →‎0. IC chips technologies
• 19:0419:04, 18 March 2022 diff hist +31‎ m Template:Highlight/core ‎No edit summary current
• 19:0319:03, 18 March 2022 diff hist +23‎ N Template:Highlight/core ‎ Created Template:Highlight/core straight from wikipedia
• 19:0119:01, 18 March 2022 diff hist +227‎ N Template:Highlight ‎ Added Template:Highlight straight from wikipedia. current

1 March 2022

• 21:0121:01, 1 March 2022 diff hist +1‎ m NES 2.0 Mapper 344 ‎ →‎Outer Bank and Mode Register ($6000-$7FFF, write): Showing address bits 0-3 in the mask. current

15 February 2022

• 20:2520:25, 15 February 2022 diff hist +669‎ Talk:CPU memory map ‎ →‎DMC DMA accessible region: new section

11 February 2022

• 05:1905:19, 11 February 2022 diff hist +1‎ m Mouse ‎ →‎Other notes: fixed link

4 February 2022

• 17:2717:27, 4 February 2022 diff hist +203‎ MMC5 ‎ →‎Write: Add warning to register $5208.
• 17:1617:16, 4 February 2022 diff hist +21‎ MMC5 pinout ‎ Improvements to CL/SL mode descriptions.
• 17:0017:00, 4 February 2022 diff hist −14‎ m ExROM ‎No edit summary current

26 January 2022

• 17:3517:35, 26 January 2022 diff hist +317‎ Expansion port ‎ →‎Extra notes: Notes about safely using /IRQ in the expansion port.

22 December 2021

• 23:4523:45, 22 December 2021 diff hist +242‎ Talk:VRC2 and VRC4 ‎No edit summary current
• 20:1320:13, 22 December 2021 diff hist +946‎ Talk:VRC2 and VRC4 ‎No edit summary
• 00:5300:53, 22 December 2021 diff hist −20‎ m VRC IRQ ‎ Undo revision 19000 by Ben Boldt (talk) Not true, VRC2 does not have IRQ... Tag: Undo
• 00:5100:51, 22 December 2021 diff hist +20‎ m VRC IRQ ‎ Mention VRC2.
• 00:4900:49, 22 December 2021 diff hist +39‎ m VRC7 ‎ Added scanline IRQ category.
• 00:4900:49, 22 December 2021 diff hist +39‎ m VRC6 ‎ Added scanline IRQ category.
• 00:4600:46, 22 December 2021 diff hist +39‎ m VRC2 and VRC4 ‎ Added scanline IRQ category.

8 December 2021

• 18:5718:57, 8 December 2021 diff hist +141‎ J.Y. Company ASIC ‎ →‎Notes: Added link to krzysiobal's forum thread, which contains a pinout of this glob chip.
• 00:2900:29, 8 December 2021 diff hist +46‎ J.Y. Company ASIC ‎ Added category.
• 00:2300:23, 8 December 2021 diff hist +48‎ m Category:Mappers using J.Y. Company ASIC ‎No edit summary current
• 00:2200:22, 8 December 2021 diff hist +44‎ NES 2.0 Mapper 397 ‎ Added category. current
• 00:2200:22, 8 December 2021 diff hist +44‎ NES 2.0 Mapper 388 ‎ Added category. current
• 00:2100:21, 8 December 2021 diff hist +44‎ NES 2.0 Mapper 387 ‎ Added category. current
• 00:2100:21, 8 December 2021 diff hist +44‎ NES 2.0 Mapper 386 ‎ Added category. current
• 00:2000:20, 8 December 2021 diff hist +44‎ NES 2.0 Mapper 358 ‎ Added category. current
• 00:2000:20, 8 December 2021 diff hist +44‎ NES 2.0 Mapper 295 ‎ Added category. current
• 00:1900:19, 8 December 2021 diff hist +44‎ NES 2.0 Mapper 282 ‎ Added category. current
• 00:1900:19, 8 December 2021 diff hist +44‎ NES 2.0 Mapper 281 ‎ Added category. current
• 00:1700:17, 8 December 2021 diff hist 0‎ m INES Mapper 090 ‎No edit summary current
• 00:1700:17, 8 December 2021 diff hist +44‎ INES Mapper 035 ‎No edit summary current
• 00:1600:16, 8 December 2021 diff hist +44‎ INES Mapper 211 ‎ Added category. current
• 00:1600:16, 8 December 2021 diff hist +44‎ m INES Mapper 209 ‎ Added category. current
• 00:1500:15, 8 December 2021 diff hist +157‎ J.Y. Company ASIC ‎ Added links and listed additional mappers.
• 00:1100:11, 8 December 2021 diff hist 0‎ N Category:Mappers using J.Y. Company ASIC ‎ Created new category for J.Y. Company ASIC mappers.
• 00:1000:10, 8 December 2021 diff hist +204‎ m INES Mapper 090 ‎ Add categories for mapper 90.

7 December 2021

• 16:5716:57, 7 December 2021 diff hist +992‎ INES Mapper 068 ‎ →‎Registers: Clarifications. No new info added. current

6 December 2021

• 23:1123:11, 6 December 2021 diff hist +318‎ PPU pinout ‎ Additional notes.

25 September 2021

• 19:3719:37, 25 September 2021 diff hist +1,400‎ Famicom Network System ‎ →‎Connection Status Byte: Added remaining status bytes from Kangyou Sumimaru no Famicom Trade manual.

24 September 2021

• 23:3423:34, 24 September 2021 diff hist +1,183‎ Famicom Network System ‎ →‎Connection Status Byte: Added Kangyou Sumimaru descriptions for status bytes 03, 04, 05
• 22:3222:32, 24 September 2021 diff hist +352‎ Famicom Network System ‎ →‎Connection Status Byte: Added error code 01 description from Kangyou Sumimaru no Famicom Trade manual.
• 20:5820:58, 24 September 2021 diff hist +2,897‎ Famicom Network System ‎ →‎Connection Status Byte: Completed entering Super Mario Club reference data into this section.
• 20:3820:38, 24 September 2021 diff hist +2,027‎ Famicom Network System ‎ →‎Connection Status Byte: Additional info added from Super Mario Club manual.
• 19:4319:43, 24 September 2021 diff hist +3,108‎ Famicom Network System ‎ →‎Connection Status Byte: Added some info from Super Mario Club manual.

23 September 2021

• 20:2220:22, 23 September 2021 diff hist +240‎ Famicom Network System ‎ →‎Commands Written by the Famicom to CPU2: Additional notes for CPU2 command $6A, added "$413x" to names of commands $10, $11, $6A.

16 September 2021

• 21:5621:56, 16 September 2021 diff hist +369‎ User talk:Abuse filter ‎No edit summary current
• 17:3017:30, 16 September 2021 diff hist +313‎ User talk:Abuse filter ‎No edit summary
• 15:2215:22, 16 September 2021 diff hist +449‎ User talk:Abuse filter ‎No edit summary

12 September 2021

• 19:4919:49, 12 September 2021 diff hist +322‎ m User talk:Lidnariq ‎ →‎24-bit hexadecimal integers

8 August 2021

• 19:0819:08, 8 August 2021 diff hist +269‎ Talk:MMC3 pinout ‎ →‎PRG RAM /CE and PRG RAM +CE

3 August 2021

• 21:3021:30, 3 August 2021 diff hist +620‎ Talk:MMC5 ‎ Thanks for the updates Quietust. It is tough with the forum down. I am adding back a new one about writing PPUDATA past $3FFF which isn't normally possible, just to keep track of the idea.
• 18:0018:00, 3 August 2021 diff hist +14‎ m Talk:MMC5 ‎ →‎List of Mysteries
• 17:4817:48, 3 August 2021 diff hist +87‎ m Talk:MMC5 ‎No edit summary
• 17:4817:48, 3 August 2021 diff hist +296‎ Talk:MMC5 ‎ →‎iNES Mapper 5 page: new section
• 17:4417:44, 3 August 2021 diff hist +124‎ m Talk:MMC5 ‎ →‎List of Mysteries
• 17:3517:35, 3 August 2021 diff hist +2,487‎ Talk:MMC5 ‎ Added some mysteries to think about.

2 August 2021

• 23:2423:24, 2 August 2021 diff hist +477‎ Famicom Network System ‎ →‎CPU2 Memory Map: Cleanup.
• 23:0523:05, 2 August 2021 diff hist +215‎ m Famicom Network System ‎ →‎Pinouts: Cleanup.

31 July 2021

• 23:1823:18, 31 July 2021 diff hist +394‎ Talk:NES 2.0 Mapper 342 ‎No edit summary

6 July 2021

• 17:1717:17, 6 July 2021 diff hist +3,454‎ User:Ben Boldt/YM2413 Patches ‎ Added Final Fantasy, Sonyc FM, Xak II current
• 04:5804:58, 6 July 2021 diff hist +68‎ User:Ben Boldt/YM2413 Patches ‎ →‎Yamaha PSS-140 Keyboard Custom Melody Patches: Added the 100 patches, verified with plgDavid.

29 June 2021

• 02:2002:20, 29 June 2021 diff hist +11,870‎ User:Ben Boldt/YM2413 Patches ‎ →‎MSX Game Custom Melody Patches: Added most of the remaining patches. Still need to do Xak II and review some additional games that my utility may not have detected patches properly.

28 June 2021

• 03:5403:54, 28 June 2021 diff hist −140‎ m User:Ben Boldt/YM2413 Patches ‎ →‎MSX Game Custom Melody Patches
• 02:5602:56, 28 June 2021 diff hist +3,507‎ User:Ben Boldt/YM2413 Patches ‎ Added some patches from MSX games, found in VGM files. I did Xak first, then continued from the beginning in alphabetical order.
• 01:3501:35, 28 June 2021 diff hist +750‎ User:Ben Boldt/YM2413 Patches ‎ →‎Lagrange Point Custom Melody Patches: Added all remaining track numbers using a utility I made that can easily extract them from VGM files.

27 June 2021

• 17:3317:33, 27 June 2021 diff hist −18‎ m User:Ben Boldt/YM2413 Patches ‎ I don't know how I make so many typos...
• 17:3317:33, 27 June 2021 diff hist +6‎ m User:Ben Boldt/YM2413 Patches ‎ →‎Lagrange Point Rhythm Patches
• 17:0817:08, 27 June 2021 diff hist −6‎ m User:Ben Boldt/YM2413 Patches ‎No edit summary
• 16:3016:30, 27 June 2021 diff hist +37‎ User:Ben Boldt/YM2413 Patches ‎No edit summary
• 16:2616:26, 27 June 2021 diff hist +3,789‎ User:Ben Boldt/YM2413 Patches ‎ Added patches from Lagrange Point ROM.

26 June 2021

• 15:1715:17, 26 June 2021 diff hist +23‎ m User:Ben Boldt/YM2413 Patches ‎No edit summary

25 June 2021

• 21:0621:06, 25 June 2021 diff hist +6,687‎ N User:Ben Boldt/YM2413 Patches ‎ Created page.

14 June 2021

• 23:5923:59, 14 June 2021 diff hist +16‎ m Famicom Network System ‎ →‎P2: Game Card Connector: Added that pin 3 is N/C in JRA-PAT.
• 03:4203:42, 14 June 2021 diff hist +122‎ PPU pinout ‎ →‎Composite Video Output: Corrected PNP ascii graphic and added that 2N3906 can be substituted.

5 June 2021

• 17:1717:17, 5 June 2021 diff hist +642‎ MMC5 audio ‎ Added expansion audio circuit used on HVC-ETROM-02 PCB.

16 May 2021

• 00:4700:47, 16 May 2021 diff hist −148‎ Famicom Network System ‎ →‎CPU2 Known Registers: New test setup with internal ROM disabled: Confirmed $412F.7 is UART Rx IRQ Enable and writing 1 to $4112.7 acknowledges it.

15 May 2021

• 21:5221:52, 15 May 2021 diff hist +117‎ Famicom Network System ‎ →‎RF5A18 CPU2 / Modem Controller: Details about pin 26 to disable internal ROM, also its effect on ROM /CE.

13 May 2021

• 21:4421:44, 13 May 2021 diff hist +148‎ Famicom Network System ‎ →‎Commands Written by the Famicom to CPU2: Improved info about command $10/$90, $11/$91 responses.
• 06:0106:01, 13 May 2021 diff hist +128‎ MMC6 ‎ Listed StarTropics and StarTropics II.
• 06:0006:00, 13 May 2021 diff hist +42‎ N Template:Citation needed ‎ Added crude [citation needed] template. current
• 01:3701:37, 13 May 2021 diff hist +229‎ m Famicom Network System ‎ →‎Commands Written by the Famicom to CPU2: Cleanup command $10 collapsed table I just added, also un-bold collapsed tables in $7D to be consistent.
• 01:2301:23, 13 May 2021 diff hist +1,566‎ Famicom Network System ‎ →‎Commands Written by the Famicom to CPU2: Added ROM data used in command $10

11 May 2021

• 00:2900:29, 11 May 2021 diff hist +2,045‎ Famicom Network System ‎ →‎CPU2 Known Registers: Added some ROM observations of registers $413x.

10 May 2021

• 05:0705:07, 10 May 2021 diff hist +755‎ Famicom Network System ‎ →‎CPU2 Commands: Found $90 and $91 response commands for commands $10 and $11. Confirmed command $C0 is a UART Rx packet.

9 May 2021

• 01:5401:54, 9 May 2021 diff hist −9‎ m Famicom Network System ‎ →‎CPU2 Known Registers: Named $4112 "UART Status".
• 01:4701:47, 9 May 2021 diff hist −806‎ Famicom Network System ‎ →‎CPU2 Known Registers: Found writing $4112.7 = 1 clears the error bits. Read/write $4110 was probably affecting the non-error bits indirectly (freeing up the buffers, etc.), making me think it was clearing them.
• 01:0601:06, 9 May 2021 diff hist +649‎ Famicom Network System ‎ →‎CPU2 Known Registers: Dual stop bit only applies to UART Tx, not Rx. More details clearing $4112 and Rx Break.

8 May 2021

• 23:1723:17, 8 May 2021 diff hist +311‎ Famicom Network System ‎ Clarified $4112.0 and .1. Reading $4110 also clears $4112 if UART Rx is enabled.
• 22:2122:21, 8 May 2021 diff hist +291‎ Famicom Network System ‎ →‎Known Registers: Added info about $40D6.1 and .2 read values.
• 04:1004:10, 8 May 2021 diff hist −97‎ Famicom Network System ‎ →‎RF5A18 CPU2 / Modem Controller: Reverting incorrect change I introduced on May 3, 2021. Pins 65&66 are bidirectional using $40D4.

7 May 2021

• 03:1703:17, 7 May 2021 diff hist +259‎ Famicom Network System ‎ →‎CPU2 Known Registers: Added $4112.2: UART Tx Idle. Clarified that $4112.1 indicates the Tx buffer is ready.
• 01:4501:45, 7 May 2021 diff hist −5‎ m Famicom Network System ‎ Cleanup

6 May 2021

• 02:2102:21, 6 May 2021 diff hist +60‎ Famicom Network System ‎ →‎CPU2 Known Registers: Added $4112.5 framing error, thanks to lidnariq.
• 01:2801:28, 6 May 2021 diff hist +910‎ Famicom Network System ‎ →‎CPU2 Known Registers: Confirmed some things for UART Rx, found parity error flag for Rx.

5 May 2021

• 23:4923:49, 5 May 2021 diff hist +208‎ m Famicom Network System ‎ →‎CPU2 Known Registers: Clarify that the UART Rx does appear to trigger an IRQ somehow, will try to confirm that with a bench test somehow.
• 16:1416:14, 5 May 2021 diff hist +533‎ Famicom Network System ‎ →‎CPU2 Known Registers: Improved built-in ROM observations of register $4111.
• 01:4701:47, 5 May 2021 diff hist +173‎ Famicom Network System ‎ →‎Known Registers: Added notes to $40D5 about reading it in real-time.
• 01:3301:33, 5 May 2021 diff hist +96‎ Famicom Network System ‎ →‎CPU2 Known Registers: Found pin 33 (MSM6827L /INT) and pin 73 (Tone Rx DV) IRQ enables on the RF5A18 chip, register $412F
• 00:4100:41, 5 May 2021 diff hist −63‎ Famicom Network System ‎ →‎CPU2 Known Registers: Removed $4113.4 write after not being able to reproduce it.
• 00:3500:35, 5 May 2021 diff hist +302‎ Famicom Network System ‎ →‎CPU2 Known Registers: Added even/odd parity for UART in $4111.

4 May 2021

• 23:4523:45, 4 May 2021 diff hist +474‎ Famicom Network System ‎ →‎CPU2 Known Registers: Added more UART findings.
• 13:3813:38, 4 May 2021 diff hist +63‎ m Famicom Network System ‎ →‎CPU2 Known Registers: Cleanup.
• 04:3604:36, 4 May 2021 diff hist +2‎ m Famicom Network System ‎ →‎CPU2 Known Registers: Fixed error where I put $4112.2 as read instead of write.
• 02:1002:10, 4 May 2021 diff hist +935‎ Famicom Network System ‎ →‎CPU2 Known Registers: Added some control register bits that affect pin 90 (MSM6827L TXD)
• 01:1501:15, 4 May 2021 diff hist 0‎ Famicom Network System ‎ →‎RF5A18 CPU2 / Modem Controller: Corrected RF5A18 pins 38, 39 are outputs only, pins 65, 66 are input only (none of those appear to behave bidirectional).
• 00:1900:19, 4 May 2021 diff hist +57‎ Famicom Network System ‎ →‎CPU2 Known Registers: Note that Pin 32 is a push-pull output when set as output mode in $4120.6
• 00:0800:08, 4 May 2021 diff hist +579‎ Famicom Network System ‎ Added info for $40D5.4 frequency depending on value written to $4114 bits 1 and 0.

2 May 2021

• 02:0402:04, 2 May 2021 diff hist +383‎ Famicom Network System ‎ →‎CPU2 Known Registers: Added details for $4120/$4121 input/output modes for pin 32.
• 01:3001:30, 2 May 2021 diff hist −43‎ Famicom Network System ‎ Updated push-pull vs. open drain configuration of Exp P3-17,18,19 via Famicom register $40D4.
• 00:1500:15, 2 May 2021 diff hist −68‎ m Famicom Network System ‎ →‎Known Registers: cleanup

1 May 2021

• 23:3023:30, 1 May 2021 diff hist +313‎ Famicom Network System ‎ Found more connections with register $40D6, depending on CPU2 registers $4112 and $4113.
• 01:4501:45, 1 May 2021 diff hist +1,492‎ Famicom Network System ‎ Added /IRQ pin to CPU2, removed +IRQ (can't replicate that), added info about $412F.5 IRQ

27 April 2021

• 15:1415:14, 27 April 2021 diff hist +432‎ Famicom Network System ‎ →‎CPU2 Known Registers: Corrected errors in register $4127 reference data.

26 April 2021

• 04:4904:49, 26 April 2021 diff hist +411‎ m Famicom Network System ‎ →‎Commands Written by the Famicom to CPU2: Cleanup
• 02:5502:55, 26 April 2021 diff hist −14‎ m Famicom Network System ‎ →‎Commands Written by the Famicom to CPU2

15 April 2021

• 22:5422:54, 15 April 2021 diff hist +113‎ Famicom Network System ‎ →‎CPU2 Known Registers: Added additional $4112 read bit observations.
• 22:4322:43, 15 April 2021 diff hist +716‎ Famicom Network System ‎ →‎CPU2 Known Registers: Added a few small observations.

12 April 2021

• 02:0902:09, 12 April 2021 diff hist +842‎ Famicom Network System ‎ →‎CPU2 Known Registers: Added newly-found info about IRQ timer in registers $4104,5,6,7 and $412F.6. It is similar to the NMI timer found by Joe.
• 00:3300:33, 12 April 2021 diff hist +224‎ m Famicom Network System ‎ →‎CPU2 Known Registers: Update "Read Has Data" column and change "(unknown)" read bits to "(unlikely to exist)" based on observed internal open bus behavior.

11 April 2021

• 23:3523:35, 11 April 2021 diff hist +318‎ Famicom Network System ‎ →‎Commands Written by the Famicom to CPU2: Cleanup.
• 23:0323:03, 11 April 2021 diff hist +40‎ Famicom Network System ‎ →‎CPU2 Known Registers: Added $4102.0 = NMI timer loop.
• 22:4322:43, 11 April 2021 diff hist +683‎ Famicom Network System ‎ →‎CPU2 Known Registers: Added info found about timer NMI.

10 April 2021

• 20:5120:51, 10 April 2021 diff hist +59‎ Famicom Network System ‎ →‎RF5A18 Internal 65C02 CPU: Measured CPU2 clock speed and found that it is 2.4576MHz.

7 April 2021

• 20:4920:49, 7 April 2021 diff hist −76‎ Famicom Network System ‎ Undo revision 18582: Theoretically pins 43-46 could be A8-A11, I don't want to exclude that.
• 20:4320:43, 7 April 2021 diff hist +76‎ Famicom Network System ‎ →‎Disk Drive Support: Updated statement about internal DRAM, not really possible.

6 April 2021

• 22:4022:40, 6 April 2021 diff hist +54‎ Famicom Network System ‎ →‎CPU2 Known Registers: Added clock source theory to Joe's awesome NMI findings.

5 April 2021

• 02:3802:38, 5 April 2021 diff hist 0‎ m Famicom Network System ‎ →‎RF5A18 CPU2 / Modem Controller: Corrected error I made on Jan 29, 2021 where RF5A18 pin 40 lost its (n/c) label.

4 April 2021

• 20:0120:01, 4 April 2021 diff hist +448‎ Famicom Network System ‎ Updated modem signals

2 April 2021

• 23:1623:16, 2 April 2021 diff hist +1,629‎ Famicom Network System ‎ →‎CPU2 Commands: Added table for connection status byte used in $80,81,82 response commands.
• 16:2616:26, 2 April 2021 diff hist +87‎ Famicom Network System ‎ →‎Commands Written by the Famicom to CPU2: Added $80/$81/$82 status bytes found in CPU2 ROM.
• 15:5715:57, 2 April 2021 diff hist +1,509‎ Famicom Network System ‎ →‎CPU2 Commands: Added some more CPU2 response commands.

1 April 2021

• 23:1423:14, 1 April 2021 diff hist +2,056‎ m Famicom Network System ‎ →‎Known Registers: Added more collapsible wikitables to hide messy reference data.
• 02:5402:54, 1 April 2021 diff hist +2,656‎ m Famicom Network System ‎ →‎CPU2 Known Registers: Hid a bunch of messy stuff inside collapsed tables
• 02:2202:22, 1 April 2021 diff hist +1,281‎ Famicom Network System ‎ →‎Commands Written by the Famicom to CPU2: Added disassembly of JRA-PAT's use of $7D, put disassemblies into collapsed wikitables.
• 00:2900:29, 1 April 2021 diff hist +20‎ m Famicom Network System ‎ →‎Commands Written by the Famicom to CPU2

31 March 2021

• 23:5323:53, 31 March 2021 diff hist +430‎ Famicom Network System ‎ →‎CPU2 Commands: Added some more CPU2 messages observed from JRA-PAT and added revisions.
• 05:1405:14, 31 March 2021 diff hist +186‎ Famicom Network System ‎ →‎Commands Written by the Famicom to CPU2: Improved Command $7D example disassembly
• 04:4204:42, 31 March 2021 diff hist +471‎ Famicom Network System ‎ →‎Commands Written by the Famicom to CPU2: Added disassembly of arbitrary code that Super Mario Club writes with command $7D.

30 March 2021

• 01:0201:02, 30 March 2021 diff hist +418‎ Famicom Network System ‎ →‎CPU2 Commands: Added examples of commands $03 and $7D from Super Mario Club

29 March 2021

• 23:5323:53, 29 March 2021 diff hist +13‎ Famicom Network System ‎ →‎CPU2 Commands: Removed incorrect information about response command $80 from command $69. Added PiT command examples $60 and $00.
• 16:0916:09, 29 March 2021 diff hist 0‎ Famicom Network System ‎ Swapped EXCLK and /RD of the MSM6827 chip as pointed out by Joe in the forum. No similar errors found testing the related signals.
• 06:2406:24, 29 March 2021 diff hist −20‎ m Famicom Network System ‎ →‎CPU2 Commands
• 01:4201:42, 29 March 2021 diff hist +1,207‎ Famicom Network System ‎ →‎CPU2 Commands: Added additional examples of response command $80 and added info that command $69 also generates response command $80.

27 March 2021

• 17:0517:05, 27 March 2021 diff hist −6‎ m Famicom Network System ‎ →‎Commands Written by the Famicom to CPU2
• 16:5616:56, 27 March 2021 diff hist +2‎ m Famicom Network System ‎ →‎Commands Written by the Famicom to CPU2
• 16:5516:55, 27 March 2021 diff hist +1,172‎ Famicom Network System ‎ →‎Commands Written by the Famicom to CPU2: Added observed CPU2 commands from forum thread.
• 14:2214:22, 27 March 2021 diff hist +739‎ Famicom Network System ‎ →‎CPU2 Commands: Added info about response $80 from CPU2 command $00.

21 March 2021

• 15:0015:00, 21 March 2021 diff hist +1,534‎ User:Ben Boldt ‎ Added pinout current
• 05:2705:27, 21 March 2021 diff hist +48‎ PPU pinout ‎ →‎Signal description: Added comment, /CS is sometimes called /DBE.

18 March 2021

• 03:3503:35, 18 March 2021 diff hist +635‎ m Famicom Network System ‎ →‎CPU2 Known Registers: Cleanup.

16 March 2021

• 15:1015:10, 16 March 2021 diff hist +9‎ Famicom Network System ‎ →‎Commands Written by the Famicom to CPU2: Added a couple ways to disconnect the modem.
• 14:4014:40, 16 March 2021 diff hist +786‎ Famicom Network System ‎ →‎CPU2 Known Registers: Added some IRQ / NMI info.

15 March 2021

• 06:5306:53, 15 March 2021 diff hist +18‎ m Famicom Network System ‎ →‎Commands Written by the Famicom to CPU2: Reduced excessive width of command $11.
• 04:0104:01, 15 March 2021 diff hist +45‎ m Famicom Network System ‎ →‎Commands Read by the Famicom from CPU2: Clarification in CPU2->FC command 0xC1.
• 03:5403:54, 15 March 2021 diff hist +1,623‎ Famicom Network System ‎ →‎CPU2 Commands: Organized CPU2 read commands into a new section, added read commands $C0 and $C1.

14 March 2021

• 23:1623:16, 14 March 2021 diff hist +589‎ Famicom Network System ‎ →‎CPU2 Commands: Added information to CPU2 command $03.
• 22:0422:04, 14 March 2021 diff hist +20‎ m Famicom Network System ‎ →‎CPU2 Known Registers: Update CPU2 register $4102 description.
• 21:2421:24, 14 March 2021 diff hist +116‎ Famicom Network System ‎ →‎CPU2 Commands: Added some CPU2 command responses.

28 February 2021

• 22:3522:35, 28 February 2021 diff hist +82‎ Famicom Network System ‎ →‎Known Registers: Added note in register $40A3 about the effect on RF5C66 pin 79 as noted previously in the forum.

27 February 2021

• 22:3222:32, 27 February 2021 diff hist −7‎ m Famicom Network System ‎ →‎CPU2 Commands: Minor fixes referencing CRC bytes within command descriptions.
• 22:1522:15, 27 February 2021 diff hist −144‎ Famicom Network System ‎ →‎CPU2 Commands: Updated "lock" / encryption terminology to CRC as pointed out by lidnariq.
• 10:0710:07, 27 February 2021 diff hist +2,375‎ Famicom Network System ‎ →‎CPU2 Commands: Added info about key/lock bytes.

20 February 2021

• 03:5603:56, 20 February 2021 diff hist 0‎ m Famicom Network System ‎ →‎CPU2 Commands: Command $60 destination RAM address was incorrect.
• 03:5003:50, 20 February 2021 diff hist +758‎ Famicom Network System ‎ →‎CPU2 Known Registers: More info for $4100/1/2

15 February 2021

• 07:1907:19, 15 February 2021 diff hist +938‎ Famicom Network System ‎ →‎CPU2 Commands: Realized command $12 is also using the key bytes. Added info to command $10. Better use of brackets.
• 05:4305:43, 15 February 2021 diff hist +335‎ Famicom Network System ‎ →‎Known Registers: Added Power-On-Reset values for some RF5C66 register write bits.
• 04:1804:18, 15 February 2021 diff hist 0‎ m Famicom Network System ‎ →‎CPU2 Commands: $7C minor fixes
• 04:1004:10, 15 February 2021 diff hist +170‎ Famicom Network System ‎ Added just a couple small items.
• 04:0104:01, 15 February 2021 diff hist +2,259‎ Famicom Network System ‎ →‎Communication Between Famicom and CPU2: Added more command info.

14 February 2021

• 23:5523:55, 14 February 2021 diff hist +981‎ Famicom Network System ‎ →‎CPU2 Known Registers: CPU2 register updates, list shadow registers at $0011=0016.
• 22:0022:00, 14 February 2021 diff hist −271‎ Famicom Network System ‎ →‎Communication Between Famicom and CPU2: Removed "type" column. There is a way to read data but it does not work like I thought. Will add it back if new findings support it.
• 21:4121:41, 14 February 2021 diff hist +797‎ Famicom Network System ‎ Details about CPU2 /Reset on older revisions Famicom Network System.
• 20:2220:22, 14 February 2021 diff hist +64‎ Famicom Network System ‎ →‎CPU2 Command Bytes: Clarify hex values with '$'.
• 05:2905:29, 14 February 2021 diff hist +2,835‎ Famicom Network System ‎ →‎Communication Between Famicom and CPU2: Improvements to command descriptions.

13 February 2021

• 04:0904:09, 13 February 2021 diff hist +534‎ Famicom Network System ‎ →‎Communication Between Famicom and CPU2: Added column for which modes commands are supported in.

9 February 2021

• 08:2208:22, 9 February 2021 diff hist +5,471‎ Famicom Network System ‎ →‎Communication Between Famicom and CPU2: Added Famicom <-> CPU2 command functions found by disassembling CPU2 ROM.

8 February 2021

• 05:0705:07, 8 February 2021 diff hist +2,684‎ Famicom Network System ‎ Added information about Famicom <-> CPU2 communication, list of commands.

4 February 2021

• 01:5901:59, 4 February 2021 diff hist +555‎ Famicom Network System ‎ →‎Disk Drive Support: Added FDS pinout possibility

3 February 2021

• 05:0805:08, 3 February 2021 diff hist +614‎ Famicom Network System ‎ →‎Known Registers: Added details about $40D5.
• 04:0504:05, 3 February 2021 diff hist +510‎ Famicom Network System ‎ →‎Known Registers: Added more input pins found on $40D4.
• 02:3902:39, 3 February 2021 diff hist −57‎ Famicom Network System ‎ Found +IRQ on CPU2, strangely enough.
• 01:3101:31, 3 February 2021 diff hist +115‎ Famicom Network System ‎ Added more input bits found in RF5A18, including /NMI.

2 February 2021

• 02:5702:57, 2 February 2021 diff hist +58‎ Famicom Network System ‎ Cleanup
• 02:3602:36, 2 February 2021 diff hist +709‎ Famicom Network System ‎ →‎CPU2 Known Registers: Added more info about the Famicom <-> CPU2 interface registers.
• 02:2502:25, 2 February 2021 diff hist +1,248‎ Famicom Network System ‎ →‎Known Registers: Added more information to $40Dx registers.

1 February 2021

• 18:4918:49, 1 February 2021 diff hist +2,730‎ Famicom Network System ‎ Rearranged the page, added overview section, added disk drive section.
• 18:0018:00, 1 February 2021 diff hist −63‎ m Famicom Network System ‎ Clarifications
• 17:5117:51, 1 February 2021 diff hist +91‎ m Famicom Network System ‎ Clarifications
• 05:2205:22, 1 February 2021 diff hist +55‎ Famicom Network System ‎ Added info about $40D3/4122 and $40D6/4113 register connections from CPU2 to Famicom CPU. Cleanup.
• 03:0303:03, 1 February 2021 diff hist +2,278‎ Famicom Network System ‎ Added $40D0/4123, 40D1/4124, 40D2/4125 connections. Added registers $40D5 and $40D6

31 January 2021

• 00:5400:54, 31 January 2021 diff hist +83‎ Famicom Network System ‎ →‎CPU2 Known Registers: Added theory that register $40D3 on Famicom CPU bus is dual-port with $4122 on CPU2 bus.

30 January 2021

• 08:5908:59, 30 January 2021 diff hist −39‎ Famicom Network System ‎ →‎CPU2 Known Registers: Corrected error in CPU2 Register $4128
• 05:0705:07, 30 January 2021 diff hist +1,579‎ Famicom Network System ‎ →‎CPU2 Known Registers: Added CPU2 read register information from $40 testing
• 04:3104:31, 30 January 2021 diff hist +5,141‎ Famicom Network System ‎ →‎CPU2 Known Registers: Added more CPU2 register read bit findings based on runaway $8F branching and redoing $41 tests on the standalone RF5A18 setup.
• 02:1302:13, 30 January 2021 diff hist +464‎ Famicom Network System ‎ →‎RF5A18 CPU2 Modem Controller: Confirmed correct CPU2 M2 pin on both of my setups is pin 19.

29 January 2021

• 08:5208:52, 29 January 2021 diff hist −113‎ Famicom Network System ‎ Cleanup odds and ends
• 08:2608:26, 29 January 2021 diff hist +55‎ Famicom Network System ‎ Added info about CPU2 register $4129 - P5 expansion port control.
• 05:3605:36, 29 January 2021 diff hist +1,275‎ Famicom Network System ‎ →‎CPU2 Known Registers: Found a number of I/O pins in the CPU2 registers.

27 January 2021

• 03:0803:08, 27 January 2021 diff hist 0‎ Famicom Network System ‎ →‎RF5A18 CPU2 Modem Controller: Identified /reset pin.

24 January 2021

• 07:3107:31, 24 January 2021 diff hist +14‎ Famicom Network System ‎ →‎CPU2 Known Registers: Reviewed and removed several additional incorrect statements.
• 07:1807:18, 24 January 2021 diff hist −11‎ Famicom Network System ‎ →‎CPU2 Known Registers: Removed incorrect statement from CPU2 register $4110
• 07:1507:15, 24 January 2021 diff hist −276‎ Famicom Network System ‎ →‎CPU2 Known Registers: Removed $F0AC from CPU2, those weren't instructions I was looking at.
• 07:0807:08, 24 January 2021 diff hist +4,889‎ Famicom Network System ‎ →‎CPU2 Known Registers: Added lots more register findings from the ROM.
• 02:3202:32, 24 January 2021 diff hist +49‎ m Famicom Network System ‎ →‎CPU2 Known Registers: a couple minor CPU2 register notes
• 02:0902:09, 24 January 2021 diff hist −5‎ m Famicom Network System ‎ →‎CPU2 Known Registers: typo
• 02:0602:06, 24 January 2021 diff hist +65‎ m Famicom Network System ‎ →‎Expansion Audio
• 01:4801:48, 24 January 2021 diff hist +4,314‎ Famicom Network System ‎ →‎CPU2 Known Registers: Added observations from CPU2 ROM disassembly.

23 January 2021

• 20:0420:04, 23 January 2021 diff hist +378‎ Famicom Network System ‎ →‎Pinouts: Added P5 Expansion connector, older revisions only.
• 18:4218:42, 23 January 2021 diff hist 0‎ m Famicom Network System ‎ →‎CPU2 Memory Map: typo fix
• 06:2306:23, 23 January 2021 diff hist +4‎ m Famicom Network System ‎ →‎CPU2 Known Registers
• 05:3705:37, 23 January 2021 diff hist +13‎ Famicom Network System ‎ →‎CPU2 Known Registers: Added info I just found about CPU2 $4129
• 05:1805:18, 23 January 2021 diff hist +5,709‎ Famicom Network System ‎ Added information about CPU2 memory organization and registers

20 January 2021

• 07:4607:46, 20 January 2021 diff hist +126‎ Famicom Network System ‎ →‎RF5A18 Modem Controller: Added CPU2 info

11 January 2021

• 01:4001:40, 11 January 2021 diff hist +870‎ m Famicom Network System ‎ →‎P3: Expansion Connector: Added orientation for expansion connector. No new information added.

10 January 2021

• 22:2722:27, 10 January 2021 diff hist +660‎ m Famicom Network System ‎ →‎Pinouts: Updated modem module edge connector with data directions. Created subsections for each pinout. No new info added.

8 January 2021

• 08:1208:12, 8 January 2021 diff hist 0‎ m Famicom Network System ‎ →‎Pinouts: Filled in some question marks with previously found register bits in the 5C66 pinout.
• 07:5307:53, 8 January 2021 diff hist +18‎ Famicom Network System ‎ →‎Known Registers: Confirmed $40C0 5C66 input pins 33 and 34 with bench test setup where I can isolate these pins from their normal connections.
• 06:4206:42, 8 January 2021 diff hist −49‎ m Famicom Network System ‎ →‎Known Registers: removed accidental text

7 January 2021

• 06:5806:58, 7 January 2021 diff hist −10‎ m Famicom Network System ‎ Changed phrase "Card RAM +CE" to just "RAM +CE" to avoid confusion. JRA-PAT doesn't use this signal in the card.
• 05:3905:39, 7 January 2021 diff hist +71‎ Famicom Network System ‎ →‎Known Registers: Removed misleading information. These registers actually get a sequence of data read/written when dialing which I will post in the forum.
• 04:2204:22, 7 January 2021 diff hist +592‎ Famicom Network System ‎ →‎Known Registers: Added observations of $40Dx registers when connecting/disconnecting
• 03:2103:21, 7 January 2021 diff hist +633‎ Famicom Network System ‎ →‎Known Registers: Found how to write to 5C66 pins 36, 37 using $40C0 and pin 28 using $40AE. Updated mirroring control register from testing.

6 January 2021

• 03:5303:53, 6 January 2021 diff hist +112‎ Famicom Network System ‎ Updated $40C0 and $40AE register descriptions based on information I found testing.

25 December 2020

• 17:1817:18, 25 December 2020 diff hist +136‎ Famicom Network System ‎ →‎Known Registers: Clarified/updated stuff about IRQ acknowledging.
• 17:0917:09, 25 December 2020 diff hist +343‎ Famicom Network System ‎ →‎Known Registers: Clean up $40A6/7
• 04:5504:55, 25 December 2020 diff hist 0‎ m Famicom Network System ‎ →‎Pinouts: typo fix
• 00:4000:40, 25 December 2020 diff hist +445‎ Famicom Network System ‎ →‎Known Registers: Added $40A9/$40AA/$40AB/RF5C66 pin 45 info

24 December 2020

• 22:3422:34, 24 December 2020 diff hist +66‎ Cartridge connector ‎ Added labels to help clarify the data directions. Some people don't need it but I do because I am always confused by it.
• 04:1804:18, 24 December 2020 diff hist +48‎ m Famicom Network System ‎ →‎Pinouts: alignment
• 04:1604:16, 24 December 2020 diff hist 0‎ m Famicom Network System ‎ →‎Known Registers: Typo fix, modem module pin 31, not 21.
• 04:1404:14, 24 December 2020 diff hist +648‎ Famicom Network System ‎ →‎Pinouts: Showing data directions on game card and expansion connectors
• 03:4003:40, 24 December 2020 diff hist +170‎ m Famicom Network System ‎ - Info about mirroring
• 03:3103:31, 24 December 2020 diff hist +301‎ Famicom Network System ‎ →‎Known Registers: Added more input pin register bits found.
• 00:3900:39, 24 December 2020 diff hist +130‎ Famicom Network System ‎ →‎Known Registers: Added pin functions found in register $40C0
• 00:2000:20, 24 December 2020 diff hist +239‎ Famicom Network System ‎ →‎Pinouts: Added detail about 5C66 pin 79

23 December 2020

• 07:3207:32, 23 December 2020 diff hist +190‎ Famicom Network System ‎ →‎Pinouts: Updated CIC pinouts based on SNES F411 pinout found by Google from jwdonal/nocash
• 03:0203:02, 23 December 2020 diff hist +115‎ Famicom Network System ‎ →‎Known Registers: Added info about acknowledging IRQ by reading $40A2.
• 00:4200:42, 23 December 2020 diff hist +364‎ Famicom Network System ‎ →‎Known Registers: More IRQ/counter details found, similar to FDS.
• 00:2200:22, 23 December 2020 diff hist +18‎ Famicom Network System ‎ →‎Known Registers: Added info about cycle counter and IRQ.

22 December 2020

• 23:2223:22, 22 December 2020 diff hist +58‎ Famicom Network System ‎ →‎Known Registers: Added newly found Exp 7/8/9 read values in $40A5.
• 02:0802:08, 22 December 2020 diff hist +370‎ Famicom Network System ‎ →‎Pinouts: Added info about CIC pins
• 01:1001:10, 22 December 2020 diff hist +269‎ Famicom Network System ‎ →‎Pinouts: Added some clock signals observed.

20 December 2020

• 08:3308:33, 20 December 2020 diff hist +7‎ Famicom Network System ‎ →‎Pinouts: Updated names of Kanji ROM address pins on the RF5C66 pinout

19 December 2020

• 23:4123:41, 19 December 2020 diff hist +1,369‎ Famicom Network System ‎ →‎Known Registers: Added more register bitfields showing existence of bits from bench test
• 23:0723:07, 19 December 2020 diff hist +461‎ Famicom Network System ‎ →‎Known Registers
• 22:4922:49, 19 December 2020 diff hist 0‎ m Famicom Network System ‎ →‎Pinouts
• 22:4922:49, 19 December 2020 diff hist +333‎ Famicom Network System ‎ →‎Pinouts: Renamed Built-in RAM +CE since the old name "Card RAM +CE" was misleading.
• 19:2919:29, 19 December 2020 diff hist +359‎ Famicom Network System ‎ →‎Pinouts: Update Kanji ROM pinout
• 04:3604:36, 19 December 2020 diff hist +1,957‎ Famicom Network System ‎ Added bitfields based on tonight's findings.

6 December 2020

• 19:2819:28, 6 December 2020 diff hist 0‎ m Famicom Network System ‎ →‎Known Registers: Changed register addresses to not reflect mirrors with X's, which is now shown more accurately in the memory map.
• 19:2519:25, 6 December 2020 diff hist +1,166‎ Famicom Network System ‎ →‎Memory Map: Expanded memory map

29 November 2020

• 05:3605:36, 29 November 2020 diff hist +166‎ Famicom Network System ‎ →‎Known Registers: Added theories from Fiskbit.
• 05:2005:20, 29 November 2020 diff hist +65‎ m Famicom Network System ‎ →‎Pinouts: Guest/Host CIC clarifications elsewhere. Some of this can be cleaned up as we learn more.
• 05:0605:06, 29 November 2020 diff hist +566‎ Famicom Network System ‎ →‎Pinouts: Added Guest CIC pinout and emphasized connections between host and guest.

27 November 2020

• 01:5601:56, 27 November 2020 diff hist −82‎ Famicom Network System ‎ →‎Pinouts: Added pin names based on MC14LC5436P Dual Tone Receiver datasheet, other cleanup.

26 November 2020

• 08:3708:37, 26 November 2020 diff hist +23‎ Famicom Network System ‎ →‎Pinouts: Pretty sure P4-30 is Modem Audio Enable.
• 08:1008:10, 26 November 2020 diff hist +138‎ Famicom Network System ‎ →‎Pinouts: Added new names for pins based on Oki MSM6827L chip datasheet.

13 November 2020

• 06:0006:00, 13 November 2020 diff hist +136‎ m Famicom Network System ‎ Additional note.
• 05:3205:32, 13 November 2020 diff hist +300‎ m Famicom Network System ‎ Added blurb about expansion audio.

8 November 2020

• 05:3805:38, 8 November 2020 diff hist +1,112‎ Famicom Network System ‎ →‎Known Registers: Added details after revisiting JRA-PAT disassembly.

7 November 2020

• 19:3619:36, 7 November 2020 diff hist −10‎ m Famicom Network System ‎ →‎Known Registers: Some cleanup (no new info added)

2 November 2020

• 01:3501:35, 2 November 2020 diff hist +799‎ Famicom Network System ‎ →‎Pinouts: Added notes about LH5323M1 address counting sequence.
• 00:5000:50, 2 November 2020 diff hist +86‎ m Famicom Network System ‎ →‎Known Registers
• 00:4600:46, 2 November 2020 diff hist +215‎ Famicom Network System ‎ →‎Pinouts: Added notes connecting the crystal frequency, divided down, matching the observed delays on RF5C66-69.
• 00:1500:15, 2 November 2020 diff hist +2,803‎ Famicom Network System ‎ →‎Known Registers: Added new register findings based on Super Mario Club ROM dump.

3 September 2020

• 04:4304:43, 3 September 2020 diff hist +12‎ MMC3 ‎ →‎CHR Banks: Similar to recent modification by Tepples, but this one for the CHR mapping table.

23 August 2020

• 04:4604:46, 23 August 2020 diff hist +42‎ m VRC6 ‎ Cleanup / clarity

1 May 2020

• 20:0420:04, 1 May 2020 diff hist +571‎ VRC7 audio ‎ →‎Internal patch set: Added patch names from plgDavid's forum post. Also added info about hidden drum patches.

27 April 2020

• 23:3123:31, 27 April 2020 diff hist +33‎ VRC7 ‎ Tweaked memory windows in TOC and included fixed PRG-RAM bank

12 February 2020

• 02:3902:39, 12 February 2020 diff hist −61‎ PPU pinout ‎ →‎Composite Video Output: Flipped entire schematic vertically so GND is on bottom, and integrated Lidnariq's addition into the text.

10 February 2020

• 15:2415:24, 10 February 2020 diff hist 0‎ m PPU pinout ‎ →‎Composite Video Output: typo
• 15:2015:20, 10 February 2020 diff hist +188‎ m PPU pinout ‎ Added statement not to cut PPU pins or wrap in foil.
• 15:0915:09, 10 February 2020 diff hist +1,484‎ PPU pinout ‎ Added composite video amplifier circuit. People always ask about this, not sure if this is the best spot for it.
• 04:4304:43, 10 February 2020 diff hist +1‎ m Namco 163 audio ‎ →‎Channel Update: Recalculated using exact nominal CPU speeds, NTSC = 21.477272MHz/12, PAL = 26.601712MHz/16

9 February 2020

• 21:2821:28, 9 February 2020 diff hist +176‎ Namco 163 audio ‎ →‎Channel Update: Updated update frequencies per NTSC CPU = 1.79 MHz and PAL CPU = 1.66 MHz.

6 February 2020

• 00:4000:40, 6 February 2020 diff hist −166‎ RAMBO-1 ‎ Fixed several errors suggesting R7 and R6 are swapped versus MMC3 behavior when in PRG-ROM mode 1.

17 December 2019

• 20:4020:40, 17 December 2019 diff hist +723‎ RAMBO-1 ‎ →‎IRQ counter operation: Added my findings, hopefully we can improve this and clean it up.

6 December 2019

• 20:5420:54, 6 December 2019 diff hist −37‎ RAMBO-1 ‎ →‎PRG Banks: Clarify, not initialized registers.

5 December 2019

• 19:2419:24, 5 December 2019 diff hist +47‎ RAMBO-1 ‎ →‎Registers: minor fixes
• 19:1819:18, 5 December 2019 diff hist +93‎ RAMBO-1 ‎ →‎CHR Banks: Clarification
• 16:4416:44, 5 December 2019 diff hist +1,057‎ RAMBO-1 ‎ →‎Bank select ($8000-$9FFE, even): Clarification. No new information here, just copying layout and tables from MMC3 and adjusting with already-known info.
• 16:2016:20, 5 December 2019 diff hist +3‎ m MMC3 ‎ →‎Bank select ($8000-$9FFE, even): Minor Clarification

3 December 2019

• 22:4922:49, 3 December 2019 diff hist +28‎ RAMBO-1 ‎ →‎IRQ acknowledge / enable ($E001-$FFFF, odd): Removed incorrect statement that this register clears IRQ. Confirmed that it does not.

24 November 2019

• 18:0818:08, 24 November 2019 diff hist +300‎ RAMBO-1 ‎ →‎Registers: Added blurb about register $A001-$BFFF, odd. Will be looking into this in the coming weeks, especially with pin 19 high.

30 October 2019

• 19:5919:59, 30 October 2019 diff hist 0‎ m MMC3 pinout ‎ →‎Pirate versions (600 mil 40-pin DIP package)

13 October 2019

• 23:5823:58, 13 October 2019 diff hist +20‎ m Famicom Network System ‎ Added pinouts category.
• 23:1223:12, 13 October 2019 diff hist 0‎ File:Template-info.svg ‎ Ben Boldt uploaded a new version of File:Template-info.svg current

12 July 2019

• 17:4317:43, 12 July 2019 diff hist −36‎ Namcot 163 family pinout ‎ Cleaned up comments

3 June 2019

• 17:2017:20, 3 June 2019 diff hist +95‎ m Famicom Network System ‎ Added some categories.
• 17:1617:16, 3 June 2019 diff hist +36‎ N User:Ben Boldt/Famicom Network System ‎ Ben Boldt moved page User:Ben Boldt/Famicom Network System to Famicom Network System: The article mas become mature enough to release. current
• 17:1617:16, 3 June 2019 diff hist 0‎ m Famicom Network System ‎ Ben Boldt moved page User:Ben Boldt/Famicom Network System to Famicom Network System: The article mas become mature enough to release.

29 March 2019

• 14:2014:20, 29 March 2019 diff hist +1,794‎ Famicom Network System ‎ Organization, bringing over info from the forum.
• 14:0314:03, 29 March 2019 diff hist +306‎ N Template:Unknown ‎ Created this page for use in wikitable yes/no cells. Wikitable cell templates {{Yes}} and {{No}} already exist in this wiki. current

18 March 2019

• 22:0822:08, 18 March 2019 diff hist −19,121‎ User:Ben Boldt ‎ Moved pinouts to new page.
• 22:0722:07, 18 March 2019 diff hist +19,162‎ N Famicom Network System ‎ Loaded pinouts onto new page.

12 March 2019

• 23:1023:10, 12 March 2019 diff hist 0‎ User:Ben Boldt ‎No edit summary
• 22:2922:29, 12 March 2019 diff hist +500‎ User:Ben Boldt ‎No edit summary

11 March 2019

• 02:4202:42, 11 March 2019 diff hist −3‎ User:Ben Boldt ‎No edit summary

10 March 2019

• 21:2021:20, 10 March 2019 diff hist +21‎ User:Ben Boldt ‎No edit summary

9 March 2019

• 23:0123:01, 9 March 2019 diff hist +104‎ User:Ben Boldt ‎No edit summary
• 22:1622:16, 9 March 2019 diff hist −12‎ User:Ben Boldt ‎No edit summary
• 22:1322:13, 9 March 2019 diff hist +689‎ User:Ben Boldt ‎No edit summary

8 March 2019

• 23:5123:51, 8 March 2019 diff hist +184‎ User:Ben Boldt ‎No edit summary
• 23:3523:35, 8 March 2019 diff hist +298‎ User:Ben Boldt ‎No edit summary

6 March 2019

• 01:5301:53, 6 March 2019 diff hist +252‎ User:Ben Boldt ‎No edit summary
• 01:2801:28, 6 March 2019 diff hist +146‎ User:Ben Boldt ‎No edit summary

5 March 2019

• 23:2323:23, 5 March 2019 diff hist 0‎ User:Ben Boldt ‎No edit summary
• 23:2323:23, 5 March 2019 diff hist 0‎ User:Ben Boldt ‎No edit summary
• 23:0923:09, 5 March 2019 diff hist 0‎ User:Ben Boldt ‎No edit summary

2 March 2019

• 05:1605:16, 2 March 2019 diff hist +37‎ User:Ben Boldt ‎No edit summary

1 March 2019

• 23:0723:07, 1 March 2019 diff hist +129‎ User:Ben Boldt ‎No edit summary

28 February 2019

• 23:5123:51, 28 February 2019 diff hist +120‎ User:Ben Boldt ‎No edit summary
• 23:4923:49, 28 February 2019 diff hist +474‎ User:Ben Boldt ‎No edit summary
• 22:0822:08, 28 February 2019 diff hist −65‎ User:Ben Boldt ‎No edit summary
• 21:4321:43, 28 February 2019 diff hist +87‎ User:Ben Boldt ‎No edit summary
• 20:4820:48, 28 February 2019 diff hist 0‎ User:Ben Boldt ‎No edit summary

27 February 2019

• 23:0423:04, 27 February 2019 diff hist +16‎ User:Ben Boldt ‎No edit summary
• 22:4622:46, 27 February 2019 diff hist 0‎ User:Ben Boldt ‎No edit summary
• 21:5721:57, 27 February 2019 diff hist 0‎ User:Ben Boldt ‎No edit summary
• 21:4021:40, 27 February 2019 diff hist +27‎ User:Ben Boldt ‎No edit summary

25 February 2019

• 19:0419:04, 25 February 2019 diff hist +12‎ User:Ben Boldt ‎No edit summary
• 03:1603:16, 25 February 2019 diff hist 0‎ User:Ben Boldt ‎No edit summary
• 03:0503:05, 25 February 2019 diff hist +137‎ User:Ben Boldt ‎No edit summary
• 03:0303:03, 25 February 2019 diff hist +20‎ User:Ben Boldt ‎No edit summary
• 02:4702:47, 25 February 2019 diff hist 0‎ User:Ben Boldt ‎No edit summary

24 February 2019

• 20:5420:54, 24 February 2019 diff hist +7‎ User:Ben Boldt ‎No edit summary
• 20:4120:41, 24 February 2019 diff hist +877‎ User:Ben Boldt ‎No edit summary
• 20:3320:33, 24 February 2019 diff hist +379‎ User:Ben Boldt ‎No edit summary
• 04:2904:29, 24 February 2019 diff hist 0‎ User:Ben Boldt ‎No edit summary
• 03:1103:11, 24 February 2019 diff hist +129‎ User:Ben Boldt ‎No edit summary
• 02:3002:30, 24 February 2019 diff hist +776‎ User:Ben Boldt ‎No edit summary

23 February 2019

• 23:4623:46, 23 February 2019 diff hist +1,423‎ User:Ben Boldt ‎No edit summary
• 19:5119:51, 23 February 2019 diff hist +179‎ User:Ben Boldt ‎No edit summary
• 16:3416:34, 23 February 2019 diff hist +2,256‎ User:Ben Boldt ‎No edit summary
• 16:0216:02, 23 February 2019 diff hist 0‎ User:Ben Boldt ‎No edit summary
• 01:2001:20, 23 February 2019 diff hist 0‎ User:Ben Boldt ‎No edit summary
• 01:1401:14, 23 February 2019 diff hist +10,023‎ User:Ben Boldt ‎No edit summary

19 February 2019

• 23:0923:09, 19 February 2019 diff hist +49‎ MMC5 ‎ →‎Scanline Detection and Scanline IRQ: Added that scanline 0 detection auto-acknowledges IRQ.

15 February 2019

• 23:5523:55, 15 February 2019 diff hist +241‎ MMC5 ‎ →‎Scanline Detection and Scanline IRQ: Important clarifications to system reset detection, showing that it is identical to disabling scanline IRQ.
• 23:2823:28, 15 February 2019 diff hist +288‎ MMC5 ‎ →‎Scanline Detection and Scanline IRQ: Added info about reset detection
• 22:1822:18, 15 February 2019 diff hist +156‎ MMC5 ‎ →‎Scanline Detection and Scanline IRQ: Clarification, writing to $2001

11 February 2019

• 20:5820:58, 11 February 2019 diff hist −59‎ MMC5 ‎ →‎Scanline Detection and Scanline IRQ: Sorry, I was wrong about NT vs AT, my test had an error, I confirmed it doesn't matter.
• 20:2720:27, 11 February 2019 diff hist +11‎ MMC5 ‎ →‎Scanline Detection and Scanline IRQ: Updated scanline IRQ occurs on PPU cycle 4 of the scanline. Also adding info that the matching fetches must not be from AT range.

9 February 2019

• 15:1115:11, 9 February 2019 diff hist +207‎ MMC5 ‎ →‎Scanline Detection and Scanline IRQ: Clarify, some things that clear the 'in frame' flag do not clear the scanline IRQ.
• 08:0608:06, 9 February 2019 diff hist +763‎ MMC5 ‎ Tweaked some things based on recent observations.
• 03:4003:40, 9 February 2019 diff hist +192‎ User:Ben Boldt ‎No edit summary
• 03:2003:20, 9 February 2019 diff hist +167‎ N User talk:NewRisingSun ‎ Created page with "Hey buddy, I got a copy of Klax for future RAMBO-1 scanline explorations. ;) ~~~~"

1 February 2019

• 08:3008:30, 1 February 2019 diff hist −4,365‎ User:Ben Boldt ‎ Replaced content with "Winning isn't fun. It is game over. See my [http://en.wikipedia.org/wiki/User:Ben_Boldt Wikipedia User Page]."

31 January 2019

• 23:0423:04, 31 January 2019 diff hist 0‎ File:Mmc5 in frame status bit.vsd ‎ Ben Boldt uploaded a new version of File:Mmc5 in frame status bit.vsd current
• 23:0323:03, 31 January 2019 diff hist 0‎ File:Mmc5 in frame status bit.png ‎ Ben Boldt uploaded a new version of File:Mmc5 in frame status bit.png current

26 January 2019

• 17:3817:38, 26 January 2019 diff hist +26‎ m Zapper ‎ Made clear that $4017 is equivalent to controller #2.
• 16:4216:42, 26 January 2019 diff hist +20‎ VRC7 ‎ Added pinout link to infobox.
• 16:4116:41, 26 January 2019 diff hist +20‎ VRC6 ‎ Added pinout link to infobox.
• 16:4016:40, 26 January 2019 diff hist +17‎ VRC3 ‎ Moved overview into infobox.
• 16:3116:31, 26 January 2019 diff hist +20‎ VRC2 and VRC4 ‎ Added pinout link to infobox.
• 16:2916:29, 26 January 2019 diff hist +32‎ VRC1 ‎ Moved overview into infobox. current
• 16:1216:12, 26 January 2019 diff hist +25‎ Sunsoft FME-7 ‎ Added pinout link to infobox.
• 16:1116:11, 26 January 2019 diff hist +30‎ RAMBO-1 ‎ Added pinout link to infobox.
• 16:0816:08, 26 January 2019 diff hist +33‎ INES Mapper 019 ‎ Added pinout link to infobox.

23 January 2019

• 18:1118:11, 23 January 2019 diff hist +20‎ MMC1 ‎ Added infobox pinout link
• 18:1018:10, 23 January 2019 diff hist +20‎ MMC2 ‎ Added infobox pinout link
• 18:0718:07, 23 January 2019 diff hist +20‎ m MMC4 ‎ Added infobox pinout link

21 January 2019

• 18:2918:29, 21 January 2019 diff hist +20‎ MMC3 ‎ Added infobox pinout link

20 January 2019

• 19:0319:03, 20 January 2019 diff hist +20‎ MMC5 ‎ Added pinout link to infobox.
• 19:0219:02, 20 January 2019 diff hist +20‎ MMC6 ‎ Added pinout link to infobox.
• 19:0119:01, 20 January 2019 diff hist +73‎ Template:Infobox iNES mapper ‎ Added option to add pinout link. Produces no visible difference unless invoked.

19 January 2019

• 18:0818:08, 19 January 2019 diff hist +28‎ MMC6 pinout ‎ Added C8 to BOM. Verified the number '8' carefully with microscope. current

12 January 2019

• 01:1201:12, 12 January 2019 diff hist +213‎ User talk:Ben Boldt ‎No edit summary

11 January 2019

• 21:3221:32, 11 January 2019 diff hist −64‎ MMC5 ‎ Updated, confirmed in thread that split screen mode is used in the ending of Bandit Kings of Ancient China.

9 January 2019

• 23:5523:55, 9 January 2019 diff hist +287‎ MMC6 pinout ‎ Updated based on idea from lidnariq which tested correct.
• 22:5722:57, 9 January 2019 diff hist +2,957‎ MMC6 pinout ‎ Added new findings from testing MMC6 and tracing Startropics NES-HKROM PCB
• 22:4822:48, 9 January 2019 diff hist +50‎ User:Ben Boldt ‎No edit summary
• 22:4222:42, 9 January 2019 diff hist +11‎ User:Ben Boldt ‎No edit summary
• 03:5303:53, 9 January 2019 diff hist +7‎ User:Ben Boldt ‎No edit summary
• 03:4403:44, 9 January 2019 diff hist −406,952‎ User:Ben Boldt ‎No edit summary
• 03:3803:38, 9 January 2019 diff hist +3‎ User:Ben Boldt ‎No edit summary
• 03:3603:36, 9 January 2019 diff hist +577‎ User:Ben Boldt ‎No edit summary

8 January 2019

• 21:2521:25, 8 January 2019 diff hist 0‎ User:Ben Boldt ‎No edit summary
• 21:2421:24, 8 January 2019 diff hist +62‎ User:Ben Boldt ‎No edit summary
• 21:1321:13, 8 January 2019 diff hist 0‎ User:Ben Boldt ‎No edit summary
• 19:3319:33, 8 January 2019 diff hist +42‎ User:Ben Boldt ‎No edit summary
• 19:1419:14, 8 January 2019 diff hist +13‎ User:Ben Boldt ‎No edit summary
• 18:4718:47, 8 January 2019 diff hist +229‎ User:Ben Boldt ‎No edit summary
• 18:0718:07, 8 January 2019 diff hist +254‎ User:Ben Boldt ‎No edit summary
• 04:2604:26, 8 January 2019 diff hist +3,149‎ User:Ben Boldt ‎No edit summary

4 January 2019

• 05:5805:58, 4 January 2019 diff hist +36‎ m MMC5 ‎ Added category "Mappers with cycle IRQs", technically only MMC5A but nonetheless.

3 January 2019

• 08:4008:40, 3 January 2019 diff hist +1‎ m MMC5 ‎ →‎Registers: Moved note to include all PPU registers.
• 04:0004:00, 3 January 2019 diff hist −2‎ m MMC5 ‎ typo fix
• 02:0702:07, 3 January 2019 diff hist +638‎ MMC5 ‎ →‎Registers: Added newly found sniffed registers

1 January 2019

• 18:3318:33, 1 January 2019 diff hist +151‎ Talk:MMC5 ‎ →‎PRG Bankswitching

22 December 2018

• 01:2501:25, 22 December 2018 diff hist +78‎ Namcot 163 family pinout ‎ Updated footnote on pin 34. This pin appears as an input. I drove this pin with 100 Hz square wave while writing randomly to registers. I did not observe 100 Hz coming out on any other pin.
• 00:2700:27, 22 December 2018 diff hist +425‎ Namcot 163 family pinout ‎ Marked pin 34 as unknown, improved ASCII graphics.

21 December 2018

• 23:3923:39, 21 December 2018 diff hist +6‎ Namcot 163 family pinout ‎ Added info about pins 22 and 44.
• 23:3723:37, 21 December 2018 diff hist +164‎ INES Mapper 019 ‎ Added info about pins 22 and 44.

20 December 2018

• 22:1822:18, 20 December 2018 diff hist +209‎ MMC5 ‎ Added new findings from krzysiobal

17 December 2018

• 22:3922:39, 17 December 2018 diff hist +185‎ MMC5 ‎ →‎Vertical Split Mode ($5200): Added info about possible split screen mode in ending sequence of Bandit Kings of Ancient China.

8 December 2018

• 00:2700:27, 8 December 2018 diff hist +207‎ MMC5 ‎ →‎Unknown Register ($5800, write only): Updating with new info/clues
• 00:1800:18, 8 December 2018 diff hist +83‎ MMC5 ‎ →‎CL3 / SL3 Data Direction and Output Data ($5207 write only): Updated with new findings.

7 December 2018

• 01:5101:51, 7 December 2018 diff hist +151‎ MMC5 ‎ →‎Overview: Added info about reset detection.

6 December 2018

• 05:4605:46, 6 December 2018 diff hist −32‎ MMC5 pinout ‎ Showing SL3 & CL3 as bidirectional pins.
• 03:4003:40, 6 December 2018 diff hist −246‎ m MMC5 ‎ →‎CL3 / SL3 Status ($5208 read/write): Removed extra info that is no longer useful.
• 03:3803:38, 6 December 2018 diff hist +236‎ MMC5 ‎ Improved CL3/SL3 register descriptions with new findings
• 03:0303:03, 6 December 2018 diff hist +116‎ MMC5 ‎ →‎Unknown Register ($5207 write only)
• 02:1602:16, 6 December 2018 diff hist +682‎ MMC5 ‎ Added new findings from VCC current spike testing tonight.