Sunsoft FME-7: Difference between revisions

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[[Category:ASIC mappers]]
{{Infobox iNES mapper
The Sunsoft FME-7 is a group of two mappers which work identically, except that one contains extra sound hardware. The FME-7 is the base memory mapper with no additional sound hardware. The Sunsoft 5B is an FME-7 with the addition of extra sound hardware (not documented here).
|name=FME-7
|name2=Sunsoft 5A/5B
|company=Sunsoft
|mapper=69
|nescartdbgames=9
|complexity=ASIC
|boards=JLROM, JSROM,<br />NES-BTR, others
|pinout=Sunsoft 5 pinout
|prgmax=512K (FME-7)<br>256K (5A/5B)
|prgpage=8K×4 + 8K fixed
|wrammax=512K (FME-7)
|wrampage=8K
|chrmax=256K
|chrpage=1Kx8
|mirroring=H, V, or 1, switchable
|busconflicts=No
|irq=CPU cycle counter
|audio=[[Sunsoft 5B audio|5B only]]
}}
[[Category:Mappers with large PRG RAM]][[Category:Nintendo licensed mappers]][[Category:Mappers with cycle IRQs]][[Category:Mappers with single-screen mirroring]]
The [[Sunsoft FME-7]] is a mapper IC used by Sunsoft in several of its games. It is nearly identical to the '''Sunsoft 5A''' and '''Sunsoft 5B''' mapper chips used only in Famicom games, with the 5B notably having expansion audio (see [[Sunsoft 5B audio]]).


The FME-7 mapper was used in only one game released in the US, ''Batman: Return of the Joker''.
The FME-7, 5A and 5B are grouped together as '''iNES Mapper 69'''.


== Overview ==
Both the Sunsoft 5B and FME-7 exist as a 44 pin TQFP chip: [[Sunsoft 5 pinout|diagram]]
* Manufacturer: Sunsoft
 
* PRG ROM Size: Up to 2048 KB (A maximum of 256 KB has been observed in production games)
In Europe, boards using the FME-7 were labeled as [[JxROM|JSROM and JLROM]]. The FME-7 mapper was used in only one game released in the US, ''Batman: Return of the Joker''. Many Japanese releases by Sunsoft used the FME-7: ''Gimmick!'', ''Hebereke'', ''Gremlins 2'' (but not in the US version), ''Barcode World'', and others.
* PRG ROM Bank Size: 8 KB at $6000, $8000, $A000, and $C000
* PRG RAM: Up to 512 KB  (A maximum of 8 KB has been observed in production games)
* CHR Bank Size: 1 KB
* CHR RAM Support: Unknown
* Nametable [[mirroring]]: Controlled by Mapper, H, V, 1scA, 1scB
* Subject to [[bus conflict]]s: No


== Banks ==
== Banks ==
Line 30: Line 44:


== Registers ==
== Registers ==
Configuration of the FME-7 is accomplished by first writing the command number to the Command Register, then writing the command's parameter byte to the Parameter Register.
Configuration of the FME-7 is accomplished by first writing the command number to the Command Register at $8000-9FFF, then writing the command's parameter byte to the Parameter Register at $A000-BFFF.
 
=== Command Register ($8000) ===
Bit7...0
----CCCC
    ++++- The command number to invoke when writing to the Parameter Register


=== Parameter Register ($A000) ===
There are 16 commands:
Bit7...0
* '''$0-7''' control CHR banking
PPPPPPPP
* '''$8-B''' control PRG banking
++++++++- The parameter to use for this command. Writing to this register invokes the command in the Command Register.
* '''$C''' controls nametable mirroring
* '''$D-F''' controls IRQ


== Commands ==
On the 5B variant, there are two additional registers at $C000-DFFF and $E000-FFFF that control the audio expansion. See: [[Sunsoft 5B audio]]
In order to invoke a command first write the command's number to the Command Register, then the desired parameter to the Parameter Register.


=== CHR Bank 0 ($00) ===
=== Command Register ($8000-$9FFF) ===
  Parameter Byte
  7  bit  0
  Bit7...0
---- ----
BBBBBBBB
  .... CCCC
++++++++- The bank number to select at PPU $0000 - $03FFF
      ||||
      ++++- The command number to invoke when writing to the Parameter Register


=== CHR Bank 1 ($01) ===
=== Parameter Register ($A000-$BFFF) ===
  Parameter Byte
  7  bit  0
  Bit7...0
---- ----
  BBBBBBBB
  PPPP PPPP
  ++++++++- The bank number to select at PPU $0400 - $07FFF
  |||| ||||
  ++++-++++- The parameter to use for this command. Writing to this register invokes the command in the Command Register.


=== CHR Bank 2 ($02) ===
== Commands ==
Parameter Byte
Bit7...0
BBBBBBBB
++++++++- The bank number to select at PPU $0800 - $0BFFF


=== CHR Bank 3 ($03) ===
=== CHR Bank 0-7 ($0-7) ===
  Parameter Byte
  7  bit  0
  Bit7...0
  ---- ----
  BBBBBBBB
BBBB BBBB
  ++++++++- The bank number to select at PPU $0C00 - $0FFFF
  |||| ||||
  ++++-++++- The bank number to select for the specified bank.


=== CHR Bank 4 ($04) ===
Bank $0 - PPU $0000-$03FF
  Parameter Byte
  Bank $1 - PPU $0400-$07FF
  Bit7...0
  Bank $2 - PPU $0800-$0BFF
  BBBBBBBB
  Bank $3 - PPU $0C00-$0FFF
  ++++++++- The bank number to select at PPU $1000 - $13FFF
  Bank $4 - PPU $1000-$13FF
Bank $5 - PPU $1400-$17FF
Bank $6 - PPU $1800-$1BFF
Bank $7 - PPU $1C00-$1FFF


=== CHR Bank 5 ($05) ===
=== PRG Bank 0 ($8) ===
  Parameter Byte
  7  bit 0
  Bit7...0
  ---- ----
  BBBBBBBB
  ERbB BBBB
++++++++- The bank number to select at PPU $1400 - $17FFF
  |||| ||||
 
  ||++-++++- The bank number to select at CPU $6000 - $7FFF
=== CHR Bank 6 ($06) ===
Parameter Byte
Bit7...0
BBBBBBBB
++++++++- The bank number to select at PPU $1800 - $1BFFF
 
=== CHR Bank 7 ($07) ===
Parameter Byte
Bit7...0
BBBBBBBB
++++++++- The bank number to select at PPU $1C00 - $1FFFF
 
=== PRG Bank 0 ($08) ===
  Parameter Byte
  Bit7...0
ERBBBBBB
  ||++++++- The bank number to select at CPU $6000 - $7FFF (limited to the first 512 KB of PRG ROM or RAM)
  |+------- RAM / ROM Select Bit
  |+------- RAM / ROM Select Bit
  |        0 = PRG ROM
  |        0 = PRG ROM
  |        1 = PRG RAM
  |        1 = PRG RAM
  +-------- RAM Enable Bit
  +-------- RAM Enable Bit ([[6264]] +CE line)
           0 = PRG RAM Disabled
           0 = PRG RAM Disabled
           1 = PRG RAM Enabled
           1 = PRG RAM Enabled


''If the RAM / ROM Select Bit is 1 (RAM selected), but the RAM Enable Bit is 0 (disabled) the data bus will be open. This is a limited form of WRAM write protection on power-up.''
The FME-7 has up to 6 bits for PRG banking (512 KiB), though this was never used in a game. The 5A and 5B, however, support only 5 (256 KiB)—hence the lowercase 'b' above. The extra address line is instead an audio expansion line, or unused.


=== PRG Bank 1 ($09) ===
It is [http://forums.nesdev.org/viewtopic.php?f=9&t=12467 confirmed] that the FME-7 outputs the bank number during accesses to $6000-$7FFF even if RAM is enabled.
Parameter Byte
Though Sunsoft never took advantage of this, it would allow making a cartridge that bank switches up to 256 KiB of PRG RAM.
Bit7...0
The FME-7 mapper in Loopy's [[PowerPak]] mappers, for example, supports 32 KiB.
BBBBBBBB
++++++++- The bank number to select at CPU $8000 - $9FFF


=== PRG Bank 2 ($0A) ===
Open bus occurs if the RAM / ROM Select Bit is 1 (RAM selected), but the RAM Enable Bit is 0 (disabled), i.e. any value in the range $40-$7F. This is a limited form of WRAM write protection on power-up.
Parameter Byte
Bit7...0
BBBBBBBB
++++++++- The bank number to select at CPU $A000 - $BFFF


=== PRG Bank 3 ($0B) ===
NOTE: the enable bit is NOT functional with 2048×8, 32768×8, and 524288×8 RAMs, because those RAMs don't have a +CE input.
Parameter Byte
Bit7...0
BBBBBBBB
++++++++- The bank number to select at CPU $C000 - $DFFF


=== Name Table Mirroring ($0C) ===
There is a [http://forums.nesdev.org/viewtopic.php?p=105129#p105129 tentative report] that [http://forums.nesdev.org/viewtopic.php?p=105193#p105193 not all games honor some or any of the bits in this register]. Corroboration is needed before any action is taken.
Parameter Byte
Bit7...0
------MM
      ++- Mirroring Mode
          0 = Vertical
          1 = Horizontal
          2 = One Screen Mirroring from $2000
          3 = One Screen Mirroring from $2400


=== IRQ Control ($0D) ===
=== PRG Bank 1-3 ($9-B) ===
  Parameter Byte
  7  bit  0
  Bit7...0
---- ----
  C------T
  ..bB BBBB
  |     +- IRQ Enable
  || ||||
  |         0 = Do not generate IRQs
  ++-++++- The bank number to select for the specified bank.
  |         1 = Do generate IRQs
 
Bank $9 - CPU $8000-$9FFF
Bank $A - CPU $A000-$BFFF
Bank $B - CPU $C000-$DFFF
 
The FME-7 has up to 6 bits for PRG banking, but the 5A and 5B support only 5.
 
=== Name Table Mirroring ($C) ===
These values are the same as [[MMC1]] mirroring modes with the MSB inverted.
7  bit  0
  ---- ----
.... ..MM
        ||
        ++- Mirroring Mode
            0 = Vertical
            1 = Horizontal
            2 = One Screen Mirroring from $2000 ("1ScA")
            3 = One Screen Mirroring from $2400 ("1ScB")
 
=== IRQ Control ($D) ===
7  bit  0
---- ----
C... ...T
  |       |
|      +- IRQ Enable
  |           0 = Do not generate IRQs
  |           1 = Do generate IRQs
  +-------- IRQ Counter Enable
  +-------- IRQ Counter Enable
          0 = Disable Counter Decrement
            0 = Disable Counter Decrement
          1 = Enable Counter Decrement
            1 = Enable Counter Decrement
 
All writes to this register acknowledge an active IRQ.<ref>Test performed in 2015 by Oliveira using [http://forums.nesdev.org/viewtopic.php?p=142243#p142243 IRQ acknowledge test ROM on NESdev BBS]</ref> It is not yet known what will happen if this register is written to at the same time as an IRQ would have been generated.
 
=== IRQ Counter Low Byte ($E) ===
7  bit  0
---- ----
LLLL LLLL
|||| ||||
++++-++++- The low eight bits of the IRQ counter


=== IRQ Counter Low Byte ($0E) ===
=== IRQ Counter High Byte ($F) ===
  Parameter Byte
  7  bit  0
  Bit7...0
---- ----
  LLLLLLLL
  HHHH HHHH
  ++++++++- The low eight bits of the IRQ counter. Note that setting this register directly sets the lower eight bits of the counter.
  |||| ||||
  ++++-++++- The high eight bits of the IRQ counter


=== IRQ Counter High Byte ($0F) ===
Writes to the IRQ counter registers directly set the lower or upper eight bits of the counter. Unlike on MMC3, there is no separate reload latch.
Parameter Byte
Bit7...0
HHHHHHHH
++++++++- The high eight bits of the IRQ counter. Note that setting this register directly sets the upper eight bits of the counter.


== IRQ Operation ==
== IRQ Operation ==
Line 164: Line 172:
# Set the counter to the desired number of cycles minus one.
# Set the counter to the desired number of cycles minus one.
# Enable the IRQ generator by turning on both the IRQ Enable and IRQ Counter Enable flags of the IRQ Control command.
# Enable the IRQ generator by turning on both the IRQ Enable and IRQ Counter Enable flags of the IRQ Control command.
# Within the IRQ handler, turn off the IRQ Enable flag of the IRQ Control command.
# Within the IRQ handler, write to the IRQ Control command to acknowledge the IRQ.
## This acknowledges the IRQ.
# Optional: Go back to Step 1 for the next IRQ.
# Optional: Go back to Step 1 for the next IRQ.


== Emulator Compatibility and Behavior ==
== References ==
{| class="tabular sortable" style="text-align: center; font-size: 85%; width: auto; table-layout: fixed;"
<references/>
|+ General functionality
|-
! Emulator
! Version
! PRG-RAM Bank
! PRG-ROM Banks
! CHR-ROM Banks
! RAM Write Disable
! RAM Read Disable
! Vertical Mirroring
! Horizontal Mirroring
! 1SCA Mirroring
! 1SCB Mirroring
|-
| Nintendulator
| 0.975
| {{Pass}}
| {{Pass}}
| {{Pass}}
| {{Pass}}
| {{Pass}}
| {{Pass}}
| {{Pass}}
| {{Pass}}
| {{Pass}}
|}


{| class="tabular sortable" style="text-align: center; font-size: 85%; width: auto; table-layout: fixed;"
== See also ==
|+ Memory capacity
* [http://nesdev.org/sunsoft.txt Sunsoft Mapper] by goroh, translated by Sgt. Bowhack.
|-
* [http://www.romhacking.net/documents/362/ NES Mapper List] by Disch
! Emulator
*[http://nesdev.org/mappers.zip Comprehensive NES Mapper Document] by \Firebug\
! Version
! RAM Page 1
! RAM Pages 2-3
! RAM Pages 4-7
! RAM Pages 8-15
! RAM Pages 16-31
! RAM Pages 32-63
! ROM Pages 0-31
! ROM Pages 32-63
! ROM Pages 64-127
! ROM Pages 128-255
! CHR Pages 0-127
! CHR Pages 128-255
|-
| Nintendulator
| 0.975
| {{Fail}}
| {{Fail}}
| {{Fail}}
| {{Fail}}
| {{Fail}}
| {{Fail}}
| {{Pass}}
| {{Pass}}
| {{Fail}}
| {{Fail}}
| {{Pass}}
| {{Pass}}
|}

Latest revision as of 19:04, 28 May 2021


FME-7
Sunsoft 5A/5B
Company Sunsoft
Games 9 in NesCartDB
Complexity ASIC
Boards JLROM, JSROM,
NES-BTR, others
Pinout Sunsoft 5 pinout
PRG ROM capacity 512K (FME-7)
256K (5A/5B)
PRG ROM window 8K×4 + 8K fixed
PRG RAM capacity 512K (FME-7)
PRG RAM window 8K
CHR capacity 256K
CHR window 1Kx8
Nametable mirroring H, V, or 1, switchable
Bus conflicts No
IRQ CPU cycle counter
Audio 5B only
iNES mappers 069

The Sunsoft FME-7 is a mapper IC used by Sunsoft in several of its games. It is nearly identical to the Sunsoft 5A and Sunsoft 5B mapper chips used only in Famicom games, with the 5B notably having expansion audio (see Sunsoft 5B audio).

The FME-7, 5A and 5B are grouped together as iNES Mapper 69.

Both the Sunsoft 5B and FME-7 exist as a 44 pin TQFP chip: diagram

In Europe, boards using the FME-7 were labeled as JSROM and JLROM. The FME-7 mapper was used in only one game released in the US, Batman: Return of the Joker. Many Japanese releases by Sunsoft used the FME-7: Gimmick!, Hebereke, Gremlins 2 (but not in the US version), Barcode World, and others.

Banks

  • CPU $6000-$7FFF: 8 KB Bankable PRG ROM or PRG RAM
  • CPU $8000-$9FFF: 8 KB Bankable PRG ROM
  • CPU $A000-$BFFF: 8 KB Bankable PRG ROM
  • CPU $C000-$DFFF: 8 KB Bankable PRG ROM
  • CPU $E000-$FFFF: 8 KB PRG ROM, fixed to the last bank of ROM
  • PPU $0000-$03FF: 1 KB Bankable CHR ROM
  • PPU $0400-$07FF: 1 KB Bankable CHR ROM
  • PPU $0800-$0BFF: 1 KB Bankable CHR ROM
  • PPU $0C00-$0FFF: 1 KB Bankable CHR ROM
  • PPU $1000-$13FF: 1 KB Bankable CHR ROM
  • PPU $1400-$17FF: 1 KB Bankable CHR ROM
  • PPU $1800-$1BFF: 1 KB Bankable CHR ROM
  • PPU $1C00-$1FFF: 1 KB Bankable CHR ROM

Registers

Configuration of the FME-7 is accomplished by first writing the command number to the Command Register at $8000-9FFF, then writing the command's parameter byte to the Parameter Register at $A000-BFFF.

There are 16 commands:

  • $0-7 control CHR banking
  • $8-B control PRG banking
  • $C controls nametable mirroring
  • $D-F controls IRQ

On the 5B variant, there are two additional registers at $C000-DFFF and $E000-FFFF that control the audio expansion. See: Sunsoft 5B audio

Command Register ($8000-$9FFF)

7  bit  0
---- ----
.... CCCC
     ||||
     ++++- The command number to invoke when writing to the Parameter Register

Parameter Register ($A000-$BFFF)

7  bit  0
---- ----
PPPP PPPP
|||| ||||
++++-++++- The parameter to use for this command. Writing to this register invokes the command in the Command Register.

Commands

CHR Bank 0-7 ($0-7)

7  bit  0
---- ----
BBBB BBBB
|||| ||||
++++-++++- The bank number to select for the specified bank.

Bank $0 - PPU $0000-$03FF
Bank $1 - PPU $0400-$07FF
Bank $2 - PPU $0800-$0BFF
Bank $3 - PPU $0C00-$0FFF
Bank $4 - PPU $1000-$13FF
Bank $5 - PPU $1400-$17FF
Bank $6 - PPU $1800-$1BFF
Bank $7 - PPU $1C00-$1FFF

PRG Bank 0 ($8)

7  bit  0
---- ----
ERbB BBBB
|||| ||||
||++-++++- The bank number to select at CPU $6000 - $7FFF
|+------- RAM / ROM Select Bit
|         0 = PRG ROM
|         1 = PRG RAM
+-------- RAM Enable Bit (6264 +CE line)
          0 = PRG RAM Disabled
          1 = PRG RAM Enabled

The FME-7 has up to 6 bits for PRG banking (512 KiB), though this was never used in a game. The 5A and 5B, however, support only 5 (256 KiB)—hence the lowercase 'b' above. The extra address line is instead an audio expansion line, or unused.

It is confirmed that the FME-7 outputs the bank number during accesses to $6000-$7FFF even if RAM is enabled. Though Sunsoft never took advantage of this, it would allow making a cartridge that bank switches up to 256 KiB of PRG RAM. The FME-7 mapper in Loopy's PowerPak mappers, for example, supports 32 KiB.

Open bus occurs if the RAM / ROM Select Bit is 1 (RAM selected), but the RAM Enable Bit is 0 (disabled), i.e. any value in the range $40-$7F. This is a limited form of WRAM write protection on power-up.

NOTE: the enable bit is NOT functional with 2048×8, 32768×8, and 524288×8 RAMs, because those RAMs don't have a +CE input.

There is a tentative report that not all games honor some or any of the bits in this register. Corroboration is needed before any action is taken.

PRG Bank 1-3 ($9-B)

7  bit  0
---- ----
..bB BBBB
  || ||||
  ++-++++- The bank number to select for the specified bank.

Bank $9 - CPU $8000-$9FFF
Bank $A - CPU $A000-$BFFF
Bank $B - CPU $C000-$DFFF

The FME-7 has up to 6 bits for PRG banking, but the 5A and 5B support only 5.

Name Table Mirroring ($C)

These values are the same as MMC1 mirroring modes with the MSB inverted. 

7  bit  0
---- ----
.... ..MM
       ||
       ++- Mirroring Mode
            0 = Vertical
            1 = Horizontal
            2 = One Screen Mirroring from $2000 ("1ScA")
            3 = One Screen Mirroring from $2400 ("1ScB")

IRQ Control ($D)

7  bit  0
---- ----
C... ...T
|       |
|       +- IRQ Enable
|           0 = Do not generate IRQs
|           1 = Do generate IRQs
+-------- IRQ Counter Enable
            0 = Disable Counter Decrement
            1 = Enable Counter Decrement

All writes to this register acknowledge an active IRQ.[1] It is not yet known what will happen if this register is written to at the same time as an IRQ would have been generated.

IRQ Counter Low Byte ($E)

7  bit  0
---- ----
LLLL LLLL
|||| ||||
++++-++++- The low eight bits of the IRQ counter

IRQ Counter High Byte ($F)

7  bit  0
---- ----
HHHH HHHH
|||| ||||
++++-++++- The high eight bits of the IRQ counter

Writes to the IRQ counter registers directly set the lower or upper eight bits of the counter. Unlike on MMC3, there is no separate reload latch.

IRQ Operation

The IRQ feature of FME-7 is a CPU cycle counting IRQ generator. When enabled the 16-bit IRQ counter is decremented once per CPU cycle. When the IRQ counter is decremented from $0000 to $FFFF an IRQ is generated. The IRQ line is held low until it is acknowledged.

How to Use the IRQ Generator

  1. Set the counter to the desired number of cycles minus one.
  2. Enable the IRQ generator by turning on both the IRQ Enable and IRQ Counter Enable flags of the IRQ Control command.
  3. Within the IRQ handler, write to the IRQ Control command to acknowledge the IRQ.
  4. Optional: Go back to Step 1 for the next IRQ.

References

  1. ↑ Test performed in 2015 by Oliveira using IRQ acknowledge test ROM on NESdev BBS

See also

Retrieved from "https://www.nesdev.org/w/index.php?title=Sunsoft_FME-7&oldid=11491"