User:Lidnariq/Discrete Logic Table: Difference between revisions

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! colspan="1" rowspan="9"|32kB PRG bank bits !! 0  
! colspan="1" rowspan="9"|32kB PRG bank bits !! 0  
| [[NROM]] || [[iNES Mapper 099|Vs. System]] || [[CNROM]], [[iNES Mapper 087|87]], [[iNES Mapper 101|101]], [[CPROM]]† ||  ||  ||  ||  ||  || style="border-right:1px solid black; border-bottom:1px solid black;"| oversize [[CNROM]]
| [[NROM]], [[iNES Mapper 143|143]], [[iNES Mapper 185|185]] || [[iNES Mapper 099|Vs. System]], [[iNES Mapper 145|145]], [[iNES Mapper 149|149]] || [[CNROM]], [[iNES Mapper 087|87]]=[[iNES Mapper 101|101]], [[CPROM]]† ||  ||  ||  ||  ||  || style="border-right:1px solid black; border-bottom:1px solid black;"| oversize [[CNROM]]
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!1  
!1  
| [[AxROM|AN1ROM]]¹ ||  || [[GxROM|MHROM]] || [[NINA-003-006|NINA-03/06]] ||  ||  ||  || style="border-right:1px solid black; border-bottom:1px solid black;"| ||
| [[AxROM|AN1ROM]]¹ ||  || [[GxROM|MHROM]], [[iNES Mapper 133|133]] || [[NINA-003-006|NINA-03/06]]=[[iNES Mapper 146|146]], [[iNES Mapper 148|148]] ||  ||  ||  || style="border-right:1px solid black; border-bottom:1px solid black;"| ||
|-
|-
!2  
!2  
| [[AxROM|ANROM]]¹, [[BNROM]] ||  || [[GxROM|GNROM]], [[iNES Mapper 038|38]] || [[iNES Mapper 058|58]]ʰ, [[iNES Mapper 086|86]], [[iNES Mapper 096|96]]†, [[iNES Mapper 174|174]]ʰ || [[Color Dreams]], [[iNES Mapper 036|36]], [[iNES Mapper 057|57]]ʰ, [[iNES Mapper 140|140]] ||  || style="border-right:1px solid black; border-bottom:1px solid black;"| oversize [[iNES Mapper 038|38]] || ||
| [[AxROM|ANROM]]¹, [[BNROM]] ||  || [[GxROM|GNROM]], [[iNES Mapper 038|38]] || [[iNES Mapper 058|58]]ʰ, [[iNES Mapper 086|86]], [[iNES Mapper 096|96]]†, [[iNES Mapper 174|174]]ʰ || [[Color Dreams]], [[iNES Mapper 036|36]], [[iNES Mapper 057|57]]ʰ, [[iNES Mapper 140|140]], [[iNES Mapper 147|147]] ||  || style="border-right:1px solid black; border-bottom:1px solid black;"| oversize [[iNES Mapper 038|38]] || ||
|-
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!3  
!3  

Revision as of 08:18, 14 May 2014

It appears that all discrete logic mappers either switch 32kB at a time with no fixed bank ("GxROM-like"), or have a 16kB fixed bank and can switch the other ("UxROM-like"). The tables below illustrate the tradeoffs between CHR, PRG, and banking style.

GxROM-like 8kB CHR bank bits
0 1 2 3 4 5 6 7 8
32kB PRG bank bits 0 NROM, 143, 185 Vs. System, 145, 149 CNROM, 87=101, CPROM oversize CNROM
1 AN1ROM¹ MHROM, 133 NINA-03/06=146, 148
2 ANROM¹, BNROM GNROM, 38 58ʰ, 86, 96†, 174ʰ Color Dreams, 36, 57ʰ, 140, 147 oversize 38
3 AOROM¹ 113ʰ
4 oversize AxROM¹, 231ʰ oversize GNROM
5 46
6 226ʰ 228ʰ 62ʰ
7
8 oversize BNROM


UxROM-like 8kB CHR bank bits
0 1 2 3 4 5 6
16kB PRG bank bits 2 168
3 UNROM, 94, 180 29 72, 78¹­ʰ, 89¹, 93*, 152¹
4 UOROM 70, 92
5 Sealie UNROM 512¹
6 oversize 94
7
8 oversize UxROM, oversize 180


† 4F+4 or 4+4F CHR-RAM banking, not 8 CHR-ROM banking
¹ has mapper-controlled single-screen mirroring
ʰ has mapper-controlled H/V mirroring
* Emulators commonly implement mapper 93 as a plain UNROM variant, not supporting CHR banking. But the hardware does support it.

Non-standard CHR banking:

  • NINA-001 has 1 bit for 32 PRG and 8 bits for 4+4 CHR banking
  • 77 has 4 bits for 2+6R CHR banking (plus 4 bits for 32 PRG banking)
  • 60, 107, and 201 use the same bits to control both PRG and CHR banks
  • 184 has 5 bits for 4+4 CHR banking