User:Lidnariq/Discrete Logic Table

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Revision as of 01:10, 11 May 2013 by Lidnariq (talk | contribs) (add NINA-001 in footnote)
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It appears that all discrete logic mappers either switch 32kB at a time with no fixed bank ("GxROM-like"), or have a 16kB fixed bank and can switch the other ("UxROM-like"). The tables below illustrate the tradeoffs between CHR, PRG, and banking style.

GxROM-like 8kB CHR bank bits
0 1 2 3 4 5 6 7 8
32kB PRG bank bits 0 NROM Vs. System CNROM, 87, 101, CPROM oversize CNROM
1 AN1ROM¹ MHROM NINA-03/06
2 ANROM¹, BNROM GNROM, 38 86, 96 11, 36, 140 oversize 38
3 AOROM¹ 113
4 oversize AxROM¹ oversize GNROM
5
6
7
8 oversize BNROM


UxROM-like 8kB CHR bank bits
0 1 2 3 4 5 6
16kB PRG bank bits 2 168
3 UNROM, 94, 180 72, 78¹, 89¹, 93, 152¹
4 UOROM 70, 92
5
6 oversize 94
7
8 oversize UxROM, oversize 180


† 4F+4 or 4+4F CHR-RAM banking, not 8 CHR-ROM banking

¹ has mapper-controlled single-screen mirroring.

Exceptions:

  • NINA-001 has 1 bit for 32 PRG and 8 bits for 4+4 CHR banking
  • 77 has 4 bits for 2+6R CHR banking (plus 4 bits for 32 PRG banking)
  • 60 and 107 use the same bits to control both PRG and CHR banks
  • 58, 174, and 231 are various discrete logic pirate multicarts
  • 184 has 5 bits for 4+4 CHR banking