GxROM: Difference between revisions

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== Hardware ==
== Hardware ==
The GNROM board contains a [[74161|74HC161]] binary counter used as a quad D latch (4-bit register) to select the current PRG and CHR banks. MHROM, on the other hand, was generally a [[glop-top]], as it was used for pack-in games and needed to be very inexpensive to produce.
The GNROM board contains a [[74161|74HC161]] binary counter used as a quad D latch (4-bit register) to select the current PRG and CHR banks. MHROM, on the other hand, was often a [[glop-top]], as it was used for pack-in games and needed to be very inexpensive to produce in huge quantities.


== Variants ==
== Variants ==
In theory, it would be possible to implement the bank select register with a [[74373]]/[[74374]]/[[74377]]/[[74573]] octal D latch, allowing up to 512 KB of PRG ROM and 128 KB of CHR ROM. The [[Color Dreams]] board, similar in function to GNROM, expanded CHR in much the same way. Official licensed games, on the other hand, used ASIC mappers instead for smaller bank sizes.
In theory, it would be possible to implement the bank select register with a [[74373]]/[[74374]]/[[74377]]/[[74573]] octal D latch, allowing up to 512 KB of PRG ROM and 128 KB of CHR ROM. The [[Color Dreams]] board, similar in function to GNROM, expanded CHR in much the same way. Official licensed games, on the other hand, used ASIC mappers instead for smaller bank sizes.

Revision as of 15:01, 12 November 2009

The designation GxROM refers to Nintendo cartridge boards labeled NES-GNROM and NES-MHROM (and their HVC counterparts), which use discrete logic to provide up to four 32 KB banks of PRG ROM and up to four 8 KB banks of CHR ROM. The iNES format assigns mapper 66 to these boards.

Overview

  • PRG ROM size: Up to 128 KB
  • PRG ROM bank size: 32 KB
  • PRG RAM: None
  • CHR capacity: Up to 32 KB ROM
  • CHR bank size: 8 KB
  • Nametable mirroring: Solder pads select vertical or horizontal mirroring
  • Subject to bus conflicts: Yes

Banks

  • CPU $8000-$FFFF: 32 KB switchable PRG ROM bank
  • PPU $0000-$1FFF: 8 KB switchable CHR ROM bank

Registers

Bank select ($8000-$FFFF)

7  bit  0
---- ----
xxPP xxCC
  ||   ||
  ||   ++- Select 8 KB CHR ROM bank for PPU $0000-$1FFF
  ++------ Select 32 KB PRG ROM bank for CPU $8000-$FFFF

Bits 5 is not used on MHROM, which supports only 64 KB PRG.

Hardware

The GNROM board contains a 74HC161 binary counter used as a quad D latch (4-bit register) to select the current PRG and CHR banks. MHROM, on the other hand, was often a glop-top, as it was used for pack-in games and needed to be very inexpensive to produce in huge quantities.

Variants

In theory, it would be possible to implement the bank select register with a 74373/74374/74377/74573 octal D latch, allowing up to 512 KB of PRG ROM and 128 KB of CHR ROM. The Color Dreams board, similar in function to GNROM, expanded CHR in much the same way. Official licensed games, on the other hand, used ASIC mappers instead for smaller bank sizes.