User contributions for Quietust
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3 June 2021
- 15:5615:56, 3 June 2021 diff hist −5 m Aladdin deck enhancer pinout "wire wire"
19 May 2021
- 14:2114:21, 19 May 2021 diff hist +1 m UNIF/UNL-DripGame No edit summary current
- 13:4713:47, 19 May 2021 diff hist −6 m UNIF/UNL-DripGame No edit summary
17 May 2021
- 13:3713:37, 17 May 2021 diff hist +1 m File:2a03 map.jpg update URL to https current
6 May 2021
- 15:2915:29, 6 May 2021 diff hist +8 m MMC1 →CHR bank 0 (internal, $A000-$BFFF): fix copy/paste error - only the lowest bit is ignored in 8KB mode
23 April 2021
- 12:5812:58, 23 April 2021 diff hist +658 Talk:CPU addressing modes No edit summary current
14 April 2021
- 15:1315:13, 14 April 2021 diff hist +69 m Emulator tests Clarify why my emulator was used for the "known good" log - kevtris used it when he was writing the test, and its debug output is also reasonably detailed
7 April 2021
- 02:5402:54, 7 April 2021 diff hist +8 m Famicom Network System for completeness, repeat the "$0027 = ~33ms" here
- 02:4602:46, 7 April 2021 diff hist +1 m PPU scrolling →Tile and attribute fetching
- 02:3802:38, 7 April 2021 diff hist +2 m PPU scrolling →Register controls: Also change "=" to "<-" to more clearly express that the values are being transferred (already updated the others above but missed these two)
- 02:3502:35, 7 April 2021 diff hist +128 PPU scrolling →Register controls: Adjust the diagrams for the various writes - order them ABCDEFGH (instead of HGFEDCBA) and mark unused bits. For the H/V updates, label the various bits according to their logical positions rather than their literal locations
26 March 2021
- 18:1318:13, 26 March 2021 diff hist +50 m Colour emphasis explain why they become unplayable current
24 March 2021
- 20:1920:19, 24 March 2021 diff hist +86 m Mapper →Common capabilities: mention Konami's ASIC mappers too
23 March 2021
- 20:5920:59, 23 March 2021 diff hist +27 m PPU pinout No edit summary
- 20:5720:57, 23 March 2021 diff hist +100 m PPU pinout Then again, I suppose it could go either way...
- 20:5620:56, 23 March 2021 diff hist +82 PPU pinout →Signal description: A dual-PPU system would have no use for genlock, but if you're using $2000.6 and the EXT pins then you'd absolutely want to keep them perfectly synchronized with each other
- 20:3220:32, 23 March 2021 diff hist −19 m PPU pinout →Signal description: siliconpr0n has a top-layer image of an RP2C04-0003, and EXT3 is connected directly to GND inside the chip.
19 February 2021
- 02:0402:04, 19 February 2021 diff hist +60 VRC7 pinout Visual analysis confirms that pin 48 *is* derived solely from pins 1 and 2, but it's hard to tell exactly what's going on.
17 February 2021
- 17:5517:55, 17 February 2021 diff hist +6 J.Y. Company ASIC Yes, the title screen actually says "PEPOLE
21 January 2021
- 16:2116:21, 21 January 2021 diff hist +5 m CPU Test Mode No edit summary
- 16:2016:20, 21 January 2021 diff hist +4 m CPU Test Mode The bottom 5 bits of W$401A don't set the "instant phase" - they set the state of the triangle's Sequencer (i.e. $07 and $18 will result in the same effective output)
- 15:5815:58, 21 January 2021 diff hist +35 CPU Test Mode Setting $401A.7 makes the pulse and noise channels output their current volume (even if disabled via length counter), pauses the triangle channel's counter, and stops DPCM from counting up or down
3 December 2020
- 15:0115:01, 3 December 2020 diff hist +101 Family Computer Disk System →Hardware: Clean this up a bit
27 November 2020
- 02:5402:54, 27 November 2020 diff hist 0 m PPU palettes →2C04: 2C04 is a PPU, not a CPU
9 November 2020
- 15:5815:58, 9 November 2020 diff hist −3 m NSF No edit summary
- 15:5115:51, 9 November 2020 diff hist −10 m Visual circuit tutorial No edit summary
- 15:4715:47, 9 November 2020 diff hist −19 m Errata No edit summary
- 15:4615:46, 9 November 2020 diff hist −26 m APU No edit summary
- 12:5912:59, 9 November 2020 diff hist −5 m MMC3 No edit summary
- 12:5412:54, 9 November 2020 diff hist −12 m PPU registers Bulleted lists shouldn't have blank lines between entries, otherwise each entry is rendered as its own distinct list
11 October 2020
- 20:2020:20, 11 October 2020 diff hist +313 m Cycle counting some extra details - explain RMW, and clarify that stack PUSH takes 1 extra cycle and stack POP takes two extra cycles
2 October 2020
- 13:3213:32, 2 October 2020 diff hist +6 m CPU pinout →Signal description: clarify that the actual duty cycle is 15/24, which happens to simplify to 5/8
25 September 2020
- 14:4214:42, 25 September 2020 diff hist +3 m PPU OAM →Dynamic RAM decay
6 September 2020
- 04:0504:05, 6 September 2020 diff hist 0 m VRC7 pinout the data pins are bidirectional, presumably only for debug mode
1 September 2020
- 13:1813:18, 1 September 2020 diff hist +89 PPU palettes →RC2C03B: clarify "color bits 0-1 are 01"
4 August 2020
- 20:5320:53, 4 August 2020 diff hist +174 Talk:Stack No edit summary current
- 20:5320:53, 4 August 2020 diff hist 0 Stack →Pulling values: fix comments to match code current
6 July 2020
- 03:1403:14, 6 July 2020 diff hist 0 m J.Y. Company ASIC →Example Games: typo
25 June 2020
- 17:1017:10, 25 June 2020 diff hist +2 m Emulator tests change links to HTTPS; I also just updated the formatting of the "PPU" column
20 May 2020
- 21:4721:47, 20 May 2020 diff hist +364 Talk:Bandai FCG board No edit summary current
- 21:3521:35, 20 May 2020 diff hist +431 Talk:Bandai FCG board No edit summary
- 15:4215:42, 20 May 2020 diff hist +60 m Talk:Bandai FCG board No edit summary
- 15:4115:41, 20 May 2020 diff hist +701 Talk:Bandai FCG board No edit summary
13 May 2020
- 13:1913:19, 13 May 2020 diff hist +45 m Visual 2C02 →Navigation (section 6)
- 13:1813:18, 13 May 2020 diff hist +106 Visual 2C02 →Navigation (section 6)
7 May 2020
- 21:2121:21, 7 May 2020 diff hist +6 m Visual 2C02 →Navigation (section 6)
- 21:1321:13, 7 May 2020 diff hist +523 Visual 2C02 →Section overview: update documentation
- 20:5520:55, 7 May 2020 diff hist 0 File:Visual 2C02 sections.jpeg Quietust uploaded a new version of File:Visual 2C02 sections.jpeg current
- 13:3713:37, 7 May 2020 diff hist +2 m Visual 2C02 https
- 13:3613:36, 7 May 2020 diff hist +418 Visual 2C02 the "unused box" is actually used now - it shows the pixels being rendered, using an RGB palette (though it doesn't emulate Emphasis yet)
25 April 2020
- 02:3102:31, 25 April 2020 diff hist 0 m PPU variants No edit summary
18 April 2020
- 03:1403:14, 18 April 2020 diff hist +1 m APU DMC form -> forum
10 April 2020
- 02:1602:16, 10 April 2020 diff hist +51 m APU Noise clarify: in early chips, the Mode flag didn't even '''exist''', so there was nothing to "ignore"
9 April 2020
- 16:3116:31, 9 April 2020 diff hist +118 NTSC video →Scanline Timing: add an image to better visualize the scanline timing tables
- 16:2916:29, 9 April 2020 diff hist +27 File:Ntsc video timing.png No edit summary
- 16:2916:29, 9 April 2020 diff hist 0 File:Ntsc video timing.png Quietust uploaded a new version of File:Ntsc video timing.png
- 16:2316:23, 9 April 2020 diff hist +570 N File:Ntsc video timing.png A visualization of the NTSC PPU's video output signal, using different colors to denote each part of the signal. * Cyan is the horizontal blanking pulse * Dark blue is the "front porch" ** Yellow is the colorburst signal * Red is the visible output re...
- 14:0014:00, 9 April 2020 diff hist +83 NTSC video merge and reword some awkwardly-short sentences
18 March 2020
- 17:1017:10, 18 March 2020 diff hist −3 m Cartridge connector "on during"
22 December 2018
- 16:3916:39, 22 December 2018 diff hist +1 m Nintendulator No edit summary
15 November 2018
- 22:5022:50, 15 November 2018 diff hist +74 m MMC5 clarify new maximum RAM size
29 November 2017
- 23:2323:23, 29 November 2017 diff hist −737 Talk:NESdev IRC channel Undo revision 14371 by 208.71.141.54 (talk) spam - will somebody PLEASE fix this wiki to properly recognize its HTTPS proxy?
18 November 2017
- 13:0613:06, 18 November 2017 diff hist +37 m Standard controller reword slightly ("missing" suggests that they were supposed to be there and were omitted by accident)
21 October 2017
- 16:0416:04, 21 October 2017 diff hist −129 Game bugs fix some nigh-unintelligible bug descriptions
7 August 2017
- 00:3500:35, 7 August 2017 diff hist +172 m Talk:INES Mapper 036 No edit summary current
6 August 2017
- 16:5116:51, 6 August 2017 diff hist +324 N Talk:INES Mapper 036 Created page with "What does "write $8000-$FFFF: copy RR to PRG banking pins" mean? Does that mean "copy RR to PP", or is it copying RR to some other internal register that's also updated during..."
18 June 2017
- 22:0322:03, 18 June 2017 diff hist −181 Talk:Nesdev/current revert spam - somebody REALLY needs to fix that HTTPS proxy...
11 June 2017
- 17:2117:21, 11 June 2017 diff hist −1 m PPU attribute tables "it's" and "its" mean completely different things
4 June 2017
- 00:3700:37, 4 June 2017 diff hist +298 N User:69.20.131.234 this seems to be both Bregalad *and* a spambot...
24 May 2017
- 17:2817:28, 24 May 2017 diff hist +2 m Implementing Mappers In Hardware →1. Recovering !RESET signal from M2: make the diode look more like a diode
11 April 2017
- 12:0412:04, 11 April 2017 diff hist +4 Talk:INES Mapper 093 No edit summary current
- 12:0312:03, 11 April 2017 diff hist +278 Talk:INES Mapper 093 No edit summary
1 April 2017
- 02:2602:26, 1 April 2017 diff hist +108 Emulator tests restore info about "nestest" (author, documentation, and sample log)
5 March 2017
- 14:3614:36, 5 March 2017 diff hist +83 m Talk:Mirroring →Castlevania 3
- 14:3414:34, 5 March 2017 diff hist +377 Talk:Mirroring →Castlevania 3: new section
22 December 2016
- 12:3512:35, 22 December 2016 diff hist +12 APU Pulse clarify - duty cycle sequencer is *immediately* restarted
17 September 2016
- 00:0200:02, 17 September 2016 diff hist 0 m Talk:Arkanoid controller No edit summary current
- 00:0100:01, 17 September 2016 diff hist +826 N Talk:Arkanoid controller Created page with ""The Arkanoid game expects the range to be $54-$F4" - from where does this information originate? I've thoroughly analyzed both Arkanoid and Arkanoid II, and neither their inp..."
8 September 2016
- 11:4011:40, 8 September 2016 diff hist −5 m VRC4 I don't "think" it does - it *actually* does, from Konami's own docs (which were originally posted at http://forums.nesdev.com/viewtopic.php?f=2&t=10611 )
16 July 2016
- 13:1513:15, 16 July 2016 diff hist +2 m Oeka Kids tablet No edit summary
- 13:1513:15, 16 July 2016 diff hist +178 Oeka Kids tablet important note - yes, the coordinates ARE scaled "backwards"
10 July 2016
- 13:3513:35, 10 July 2016 diff hist +91 CPU Test Mode APU test mode is only present in the 2A03G (and possibly some earlier revisions), and the IRQ counter was only present in the original 2A03 (where pin 30 did nothing at all).
22 May 2016
- 19:5819:58, 22 May 2016 diff hist −122 Emulator tests Kevin Horton (kevtris) wrote nestest, and that's the official readme file for it. I've also just updated the "reference" logfile on my website to fix the JMP ($xxFF) error and also remove the (mostly-useless) scanline numbers
7 February 2016
- 14:2014:20, 7 February 2016 diff hist +141 m User talk:181.48.80.122 No edit summary current
6 February 2016
- 16:2216:22, 6 February 2016 diff hist +282 User talk:181.48.80.122 No edit summary
14 December 2015
- 03:5303:53, 14 December 2015 diff hist −901 Talk:Jump table we don't speak Korean here, and we aren't interested in your website either
8 November 2015
- 17:4117:41, 8 November 2015 diff hist +129 INES Mapper 196 or 瑪莉, or 瑪琍; not surprisingly, there are quite a few "spellings"
- 14:2014:20, 8 November 2015 diff hist +10 m INES Mapper 196 馬理
4 September 2015
7 August 2015
- 03:0203:02, 7 August 2015 diff hist −152 NES 2.0 Undo revision 11442 by Rainwarrior (talk) - the part you edited describes the STANDARD header - the table immediately beneath it already describes how it works in NES 2.0
17 July 2015
- 11:3911:39, 17 July 2015 diff hist −42 m MMC5 →Overview: original description seemed like a bit of a tautology...
- 11:3511:35, 17 July 2015 diff hist +22 MMC5 there's really only 3 true source nametables - the 4th one is fill mode, all the same tile, all the same color
14 June 2015
- 23:3323:33, 14 June 2015 diff hist −4 m Visual circuit tutorial →Clocked latches: db7 is the 8th bit (since db0 is the first bit)
18 February 2015
- 04:4104:41, 18 February 2015 diff hist 0 m VRC7 pinout XTAL pins also have a definite direction going on
29 January 2015
- 05:0505:05, 29 January 2015 diff hist 0 VRC7 pinout based on decap image, pin 15 is an input and pin 48 is an output
3 November 2014
- 14:4114:41, 3 November 2014 diff hist +149 m Talk:APU Frame Counter →PAL
30 October 2014
30 September 2014
- 16:0316:03, 30 September 2014 diff hist +2 m UNIF/UNL-DripGame No edit summary
12 May 2014
- 14:4614:46, 12 May 2014 diff hist −38 NTSC video pretty sure this is a typo
1 March 2014
- 01:3201:32, 1 March 2014 diff hist −1 Game Genie it's != its