User contributions for Quietust
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14 June 2015
- 23:3323:33, 14 June 2015 diff hist −4 m Visual circuit tutorial →Clocked latches: db7 is the 8th bit (since db0 is the first bit)
18 February 2015
- 04:4104:41, 18 February 2015 diff hist 0 m VRC7 pinout XTAL pins also have a definite direction going on
29 January 2015
- 05:0505:05, 29 January 2015 diff hist 0 VRC7 pinout based on decap image, pin 15 is an input and pin 48 is an output
3 November 2014
- 14:4114:41, 3 November 2014 diff hist +149 m Talk:APU Frame Counter →PAL
30 October 2014
30 September 2014
- 16:0316:03, 30 September 2014 diff hist +2 m UNIF/UNL-DripGame No edit summary
12 May 2014
- 14:4614:46, 12 May 2014 diff hist −38 NTSC video pretty sure this is a typo
1 March 2014
- 01:3201:32, 1 March 2014 diff hist −1 Game Genie it's != its
22 January 2014
- 19:0019:00, 22 January 2014 diff hist +187 m The frame and NMIs a few minor grammar/related fixes
2 January 2014
- 17:4617:46, 2 January 2014 diff hist +30 m Visual circuit tutorial →Digital-to-analog conversion (DAC)
- 17:4417:44, 2 January 2014 diff hist +41 m Visual circuit tutorial →Decoders and mask ROMs: this particular ROM is a NOR ROM - other variants include OR (for PMOS) and NAND (also NMOS)
- 17:0017:00, 2 January 2014 diff hist +55 m Projects →stuff by Quietust
- 16:5816:58, 2 January 2014 diff hist 0 m Talk:CPU pinout →Pin 30
- 16:5016:50, 2 January 2014 diff hist +340 Talk:CPU pinout →Pin 30
23 December 2013
- 18:5518:55, 23 December 2013 diff hist +5 m .pal No edit summary
11 December 2013
- 12:2312:23, 11 December 2013 diff hist +308 File talk:Ntsc timing.png No edit summary
4 December 2013
- 15:5315:53, 4 December 2013 diff hist +1 m Visual circuit tutorial →Inverters: this terminology is almost definitely specific to this article
23 October 2013
- 15:2215:22, 23 October 2013 diff hist +395 Talk:VRC6 No edit summary
- 15:0715:07, 23 October 2013 diff hist +436 N Talk:VRC6 Created page with "The VRC6 documentation (currently linked from [http://forums.nesdev.com/viewtopic.php?f=2&t=10611 here]) seems to indicate that register $B003 has quite a lot more bits than w..."
5 October 2013
- 01:5001:50, 5 October 2013 diff hist −4 m MMC5 No edit summary
8 August 2013
- 20:2320:23, 8 August 2013 diff hist +8 m Talk:The skinny on NES scrolling →Split X/Y scroll simplification
- 20:1820:18, 8 August 2013 diff hist +738 Talk:The skinny on NES scrolling →Split X/Y scroll simplification: new section
12 July 2013
- 00:2000:20, 12 July 2013 diff hist −115 m Category talk:Discrete logic mappers go away current
2 July 2013
- 17:5617:56, 2 July 2013 diff hist −37 m Tricky-to-emulate games get rid of the underscores
29 June 2013
- 01:4101:41, 29 June 2013 diff hist +153 User talk:Tepples →Talk:APU: new section current
- 01:3001:30, 29 June 2013 diff hist +34 m Visual circuit tutorial →Terms
- 01:3001:30, 29 June 2013 diff hist −18 Visual circuit tutorial →Terms
- 01:2601:26, 29 June 2013 diff hist +1,539 Visual circuit tutorial →Terms: describe PMOS and CMOS, just for completeness
- 00:3900:39, 29 June 2013 diff hist +126 m Visual circuit tutorial →Adders
- 00:3300:33, 29 June 2013 diff hist +7 Visual circuit tutorial →DRAM refresh: it wasn't "possible" to readd them - it was *required* because otherwise it didn't work anymore
28 June 2013
- 17:4417:44, 28 June 2013 diff hist 0 m The skinny on NES scrolling →Y increment
- 17:4117:41, 28 June 2013 diff hist −87 m The skinny on NES scrolling →Explanation
- 17:3117:31, 28 June 2013 diff hist +199 The skinny on NES scrolling →Stuff that affects register contents: a few tweaks; I also think I understand why $2006 clears bit 14, after looking at the chip more closely
- 17:1617:16, 28 June 2013 diff hist +13 PPU power up state don't call them "loopy's registers" - one is a latch, while the other is the actual address
24 June 2013
- 23:2323:23, 24 June 2013 diff hist +247 Talk:Myths No edit summary
23 June 2013
- 12:5412:54, 23 June 2013 diff hist −62 Talk:PPU rendering Undo revision 6790 by 202.59.128.254 (talk) spam
22 June 2013
- 21:4821:48, 22 June 2013 diff hist −40 m Colour-emphasis games No edit summary
- 21:4721:47, 22 June 2013 diff hist +17 m Colour-emphasis games No edit summary
13 June 2013
- 16:2516:25, 13 June 2013 diff hist +542 Myths can't believe Color Emphasis was never mentioned - it came from Marat's documentation, and it's even present in nestech.txt!
- 16:1916:19, 13 June 2013 diff hist −37 m Myths →PPU details
- 16:1716:17, 13 June 2013 diff hist +259 Myths →PPU details: we've since figured out what's most likely going on
11 June 2013
- 01:1501:15, 11 June 2013 diff hist +154 Visual circuit tutorial represent the actual CPU clock ratio
2 June 2013
- 18:4618:46, 2 June 2013 diff hist +1,138 Talk:Visual circuit tutorial →PLA: new section
29 May 2013
- 13:1413:14, 29 May 2013 diff hist +1 m Talk:Visual circuit tutorial No edit summary
- 13:1313:13, 29 May 2013 diff hist +524 Talk:Visual circuit tutorial →Pictures
- 02:2102:21, 29 May 2013 diff hist +9 m Visual circuit tutorial →Cut-off connections
- 02:2002:20, 29 May 2013 diff hist +25 Visual circuit tutorial decimal mode was actually removed by making extremely minimal changes to the middle of the 6502 - the cut-off connections along the edges are from removing the output drivers
- 02:1202:12, 29 May 2013 diff hist +157 Visual circuit tutorial →DRAM (Dynamic RAM)
28 May 2013
- 21:2621:26, 28 May 2013 diff hist +60 m Projects →stuff by Quietust
- 21:2121:21, 28 May 2013 diff hist +4 m Cartridge connector →Signal Descriptions
- 21:2021:20, 28 May 2013 diff hist −21 Cartridge connector →Signal Descriptions: don't put blank lines between list elements, otherwise the HTML comes out as a bunch of single-element lists
- 17:5617:56, 28 May 2013 diff hist −2 Visual circuit tutorial →Digital-to-analog conversion (DAC): wikipedia article "voltage ladder" describes this more closely
26 May 2013
- 18:2018:20, 26 May 2013 diff hist +388 Visual circuit tutorial →APU clock signals
25 May 2013
- 01:1001:10, 25 May 2013 diff hist +234 Visual circuit tutorial →Wire capacitance as storage
- 01:0001:00, 25 May 2013 diff hist +9 Visual circuit tutorial mention some proper terms, remove some which are likely not correct
24 May 2013
- 21:5921:59, 24 May 2013 diff hist −1 Visual circuit tutorial there is only one "r" in "buried"
- 21:5821:58, 24 May 2013 diff hist −1 m Visual circuit tutorial →Layers
16 May 2013
- 17:2217:22, 16 May 2013 diff hist +92 NTSC video →Scanline Timing: add timing offsets
- 04:0204:02, 16 May 2013 diff hist −1 PPU rendering The?
21 April 2013
- 18:1018:10, 21 April 2013 diff hist −1 PPU sprite evaluation No edit summary
2 April 2013
- 23:4223:42, 2 April 2013 diff hist +203 PPU →Notes
31 March 2013
- 15:4915:49, 31 March 2013 diff hist −25 m PPU pinout →Signal description
- 15:4815:48, 31 March 2013 diff hist +18 PPU pinout →Signal description
- 15:3315:33, 31 March 2013 diff hist +774 Talk:PPU pinout →SYNC -> RST: new section
- 15:2315:23, 31 March 2013 diff hist −1 PPU pinout rename VBL to INT
- 15:2015:20, 31 March 2013 diff hist +370 PPU pinout This is a RESET signal (the "Family Computer Schematic" on nesdev.com even labels it as such), not SYNC...
30 March 2013
- 15:5615:56, 30 March 2013 diff hist +164 N Talk:ExROM Created page with "For the solder pads, what are the actual connections established in each mode? --~~~~"
29 March 2013
- 20:3520:35, 29 March 2013 diff hist +318 Talk:PPU registers be more careful when adding comments - you reverted 2 of Rainwarrior's edits...
28 March 2013
- 03:2403:24, 28 March 2013 diff hist +353 N Talk:Reading 2007 during rendering Created page with "Summary: reading or writing $2007 during rendering will cause the VRAM address to increment by '''1 scanline''', just like it does at the beginning of HBLANK. I tracked this d..."
24 March 2013
- 23:2323:23, 24 March 2013 diff hist +174 Talk:Visual 2C02 No edit summary
- 18:2618:26, 24 March 2013 diff hist +67 Visual 2C02 No edit summary
- 18:2318:23, 24 March 2013 diff hist +37 Visual 2C02 →Tracing (section 6)
- 18:2118:21, 24 March 2013 diff hist +39 Visual 2C02 →Register access (section 2): actually, you DO get the value when you read - it's placed into the "value" column after the read finishes
- 18:1918:19, 24 March 2013 diff hist +101 m Visual 2C02 →Running (section 1)
- 18:1818:18, 24 March 2013 diff hist +679 Visual 2C02 →Running (section 1): describe states
- 18:1218:12, 24 March 2013 diff hist −2 Visual 2C02 No edit summary
- 04:0004:00, 24 March 2013 diff hist −3 PPU power up state I've traced circuitry inside the 2C02 which forces $2000, $2001, fine-X, VRAMaddr_T (but not VRAMaddr_V), and the $2007 read buffer to zero for the entire duration of the first frame
22 March 2013
- 03:3603:36, 22 March 2013 diff hist +463 PPU registers →Obscure details of OAMADDR
- 03:3003:30, 22 March 2013 diff hist +234 Talk:NES 2.0 →Vs PPUs and $2002: new section
20 March 2013
- 01:5801:58, 20 March 2013 diff hist +25 m User talk:Zzo38/Mapper 768 No edit summary
- 01:5801:58, 20 March 2013 diff hist +667 N User talk:Zzo38/Mapper 768 →Extra Data: new section
19 March 2013
- 00:0200:02, 19 March 2013 diff hist −7 Mouse No edit summary
- 00:0000:00, 19 March 2013 diff hist +6 m Mouse No edit summary
15 March 2013
- 23:4423:44, 15 March 2013 diff hist +50 PPU the palette is SRAM
- 13:1413:14, 15 March 2013 diff hist +120 Zapper misread - the standard Zapper is inverted, but the Vs. Zapper is *not* inverted\
- 12:5012:50, 15 March 2013 diff hist −1 Zapper it's inverted in the standard Zapper as well - "0: detected, 1: not detected"
14 March 2013
- 04:0704:07, 14 March 2013 diff hist +74 Zapper No edit summary
13 March 2013
- 23:5523:55, 13 March 2013 diff hist +4 m Zapper No edit summary
- 23:5423:54, 13 March 2013 diff hist +395 Zapper No edit summary
12 March 2013
- 20:5820:58, 12 March 2013 diff hist +64 m PPU sprite evaluation offset cycle numbers, confirmed in visual2c02
14 February 2013
- 14:2814:28, 14 February 2013 diff hist −6 PPU rendering →Prerender Scanline -1 or 261: only the vertical bits are reloaded there; the horizontal bits are reloaded earlier
- 14:2614:26, 14 February 2013 diff hist 0 m Talk:NTSC video No edit summary
- 14:2414:24, 14 February 2013 diff hist +286 Talk:NTSC video No edit summary
11 January 2013
- 03:4903:49, 11 January 2013 diff hist +683 Talk:The skinny on NES scrolling →Actual timing for V/T updates during rendering: new section
12 November 2012
- 02:2302:23, 12 November 2012 diff hist +138 Action 53 mapper →$80: Mode: clarification
5 November 2012
- 21:3621:36, 5 November 2012 diff hist −94 m Emulators →Under development: duplicate
1 November 2012
- 16:0816:08, 1 November 2012 diff hist +236 PPU pinout No edit summary
- 16:0416:04, 1 November 2012 diff hist +453 m PPU registers →Controller ($2000) > write
- 14:5014:50, 1 November 2012 diff hist +470 Talk:NTSC video No edit summary
29 October 2012
- 17:1717:17, 29 October 2012 diff hist +353 Talk:NTSC video No edit summary
27 October 2012
- 01:4301:43, 27 October 2012 diff hist +138 INES Mapper 100 Nintendulator uses 100 as a debug mapper - select PRG/CHR banks at will, choosing ROM or RAM (or nametables for PPU)
14 October 2012
- 17:1317:13, 14 October 2012 diff hist +5 m Talk:INES Mapper 151 No edit summary
- 17:1317:13, 14 October 2012 diff hist +180 N Talk:INES Mapper 151 Created page with "Does the VS version of this mapper have controllable mirroring, or does it use 4-screen VRAM like most (all?) VS games do? --~~~~"
11 August 2012
- 00:0100:01, 11 August 2012 diff hist +133 N MediaWiki talk:Sidebar Created page with "The "NESdev BBS" link needs to be updated - it's still pointing to parodius. --~~~~" current
3 August 2012
- 00:5200:52, 3 August 2012 diff hist 0 m Taito X1-017 fix copy/paste error?
24 June 2012
- 16:2916:29, 24 June 2012 diff hist +373 N Talk:INES Mapper 116 Created page with ""However, it seems important that the $8xxx, $9xxx, $Axxx regs be mapped to the entire $1000 region ('''unlike stock VRC2 which is supposedly strictly answering to $8000-$8003..."
22 March 2012
- 02:4002:40, 22 March 2012 diff hist −35 INES Mapper 005 my Copper Bars demo is NROM; though there is an MMC5 version, it was designed specifically to test execution of code from ExRAM but was never (to my knowledge) tested on a real MMC5
16 March 2012
- 03:2203:22, 16 March 2012 diff hist +6 m User:Quietust was expecting to see a delayered 2C02 by now - maybe later?
12 March 2012
- 17:3817:38, 12 March 2012 diff hist −78 m APU the Visual 2A03 just took existing images (produced using whatever expensive methods) and processed them by hand - the only cost was my own time, and I'd like to think it was worth it...
- 13:5613:56, 12 March 2012 diff hist +52 m APU No edit summary
9 December 2011
- 17:5417:54, 9 December 2011 diff hist +127 N Talk:Super NES Mouse Created page with "Is there any actual data in the first byte, or is it just all zeroes? --~~~~"
15 November 2011
- 01:5501:55, 15 November 2011 diff hist +8 m Emulator tests →CPU: that log is from Nintendulator, not FCEUX - I would know, since I'm the one who generated it in the first place
- 01:2301:23, 15 November 2011 diff hist +171 m Talk:APU DMC →DMC find
- 00:5500:55, 15 November 2011 diff hist −3 m Talk:APU DMC No edit summary
- 00:4500:45, 15 November 2011 diff hist +247 m Talk:APU DMC No edit summary
14 November 2011
- 22:5522:55, 14 November 2011 diff hist +2 m Talk:APU DMC No edit summary
- 22:5522:55, 14 November 2011 diff hist +893 Talk:APU DMC have you forgotten that the Visual 2A03 exists?
- 01:4501:45, 14 November 2011 diff hist −1,881 m Bandai EPROM mapper Redirected page to Bandai FCG board current
9 November 2011
- 18:5018:50, 9 November 2011 diff hist −1 m Cartridge and mappers' history people need to learn proper spelling and grammar...
- 18:5018:50, 9 November 2011 diff hist −197 m Cartridge and mappers' history formatting
22 October 2011
- 18:1418:14, 22 October 2011 diff hist +16 m Talk:CPU power up state revised from visual2a03
- 18:0518:05, 22 October 2011 diff hist +60 m Talk:CPU pinout No edit summary
18 October 2011
- 14:5114:51, 18 October 2011 diff hist +213 N File:Vramaddr.jpg VRAM address register within the PPU, with annotations for write enables and data inputs for $2000/$2005/$2006 and the two T->V signals. Everything appears to be consistent with the skinny on NES scrolling. current
17 October 2011
- 23:4223:42, 17 October 2011 diff hist +212 Talk:Power Pad No edit summary
15 October 2011
- 02:2202:22, 15 October 2011 diff hist −24 m User:Quietust Visual6502.org's depackager/delayerer has been unavailable for the past 2 months and is expected to remain unavailable until "early next year", so no visual 2C02 until then :(
11 October 2011
- 16:5216:52, 11 October 2011 diff hist 0 m Accuracy pretty sure this is supposed to be $2007...
28 September 2011
- 17:5917:59, 28 September 2011 diff hist +668 N Talk:NTSC video cursory examination of the PPU's video signal generator
16 September 2011
- 18:2818:28, 16 September 2011 diff hist +673 Talk:CPU pinout just tested pin 30 with my CopyNES, and it DOES enable extra I/O registers
14 September 2011
- 19:5819:58, 14 September 2011 diff hist +175 Talk:CPU pinout was that actually verified?
13 September 2011
- 01:4801:48, 13 September 2011 diff hist +79 m User:Quietust alternate contact
12 September 2011
- 00:5800:58, 12 September 2011 diff hist −2 m User:Quietust No edit summary
2 September 2011
- 03:2803:28, 2 September 2011 diff hist +75 m File:2a03 map.jpg No edit summary
- 03:2703:27, 2 September 2011 diff hist +142 m User:Quietust Visual 2A03 URL changed; also, 2C02 is in progress (though stalled for the past 3 weeks, waiting for the chip to be delayered)
26 August 2011
- 21:2821:28, 26 August 2011 diff hist +8 m Mirroring →4-screen VRAM: this too
- 21:2721:27, 26 August 2011 diff hist +2 m Mirroring →Single-Screen: I'm assuming this is what you meant here...
- 02:2002:20, 26 August 2011 diff hist +305 Talk:NES 2.0 No edit summary
14 July 2011
- 03:1003:10, 14 July 2011 diff hist +164 Talk:CPU pinout →M2: new section
13 July 2011
- 12:4112:41, 13 July 2011 diff hist +212 m Talk:APU Frame Counter No edit summary
- 12:3712:37, 13 July 2011 diff hist +188 m Talk:APU Frame Counter No edit summary
- 03:3603:36, 13 July 2011 diff hist −2 m APU Frame Counter No edit summary
- 03:2003:20, 13 July 2011 diff hist +256 Talk:APU Frame Counter more info
- 03:1603:16, 13 July 2011 diff hist 0 APU Frame Counter make them actually APU cycles...
- 03:1403:14, 13 July 2011 diff hist −17 APU Frame Counter it takes 2 CPU cycles (1 APU cycle) to reset, not 2 APU cycles
12 July 2011
- 19:3319:33, 12 July 2011 diff hist +453 Talk:APU Frame Counter No edit summary
- 13:0713:07, 12 July 2011 diff hist +91 Talk:APU Frame Counter No edit summary
10 July 2011
- 21:1421:14, 10 July 2011 diff hist −237 APU Frame Counter there is NO 240Hz divider - the frame counter is a 15-bit counter (LFSR) that generates triggers at each cycle count; also, subtract 3 from cycle counts because of the reload delay on $4017 write
6 July 2011
- 03:3703:37, 6 July 2011 diff hist +39 m PPU sprite evaluation explain why the sprite engine is seemingly idle during these points - it's waiting for other things to happen within the PPU
30 June 2011
- 02:1402:14, 30 June 2011 diff hist +92 m User:Quietust No edit summary
29 June 2011
- 18:5718:57, 29 June 2011 diff hist +55 m Talk:APU Frame Counter clarify
- 18:4118:41, 29 June 2011 diff hist +308 m Talk:APU Frame Counter No edit summary
15 June 2011
- 12:5812:58, 15 June 2011 diff hist −132 m Emulators duplicate
8 June 2011
- 16:4116:41, 8 June 2011 diff hist +16 m Talk:CPU power up state No edit summary
- 16:4016:40, 8 June 2011 diff hist +1,401 N Talk:CPU power up state using my previous trace of the reset line combined with the "regions" image overlay
- 02:1202:12, 8 June 2011 diff hist +63 m File:2a03 map.jpg there's now a layer image that highlights all of these regions
6 June 2011
- 03:0303:03, 6 June 2011 diff hist −2 m Talk:APU DMC No edit summary
- 03:0303:03, 6 June 2011 diff hist +336 Talk:APU DMC No edit summary
18 May 2011
- 20:4220:42, 18 May 2011 diff hist +106 m Talk:APU Sweep No edit summary
- 20:4120:41, 18 May 2011 diff hist +27 m Talk:APU Sweep the triangle channel is clocked by every M1 pulse, and the rest of the APU is clocked either by even M1 pulses or odd M1 pulses (with a vast majority being even)
- 17:1517:15, 18 May 2011 diff hist +500 Talk:APU Sweep No edit summary
- 03:4903:49, 18 May 2011 diff hist +399 Talk:APU Sweep No edit summary
16 May 2011
- 02:2202:22, 16 May 2011 diff hist −274 File:2a03 map.jpg created a chip images index page on my site
14 May 2011
- 17:1617:16, 14 May 2011 diff hist +398 Talk:APU Sweep food for thought and/or research
- 16:5616:56, 14 May 2011 diff hist +14 APU Sweep clarify
- 16:4616:46, 14 May 2011 diff hist +104 APU Sweep the problem isn't in pulse 2, but in pulse 1 - pulse 2 adds the two's complement during subtraction (as it should), but pulse 1 adds the ONE'S complement due to its carry input being hardwired
- 16:3716:37, 14 May 2011 diff hist +131 APU Pulse The duty cycle counter actually counts downward (since it's triggered by frequency counter underflow), but it's initialized to 000 rather than 111, which explains the waveform sequences
11 May 2011
- 03:1803:18, 11 May 2011 diff hist −10 File:Apu address.jpg it also overrides the noise channel's LFSR output and appears to also stop the triangle channel from being clocked; I don't know what it does to DPCM, but it's probably something similar current
- 03:0303:03, 11 May 2011 diff hist +12 File:Apu address.jpg setting $401A.7 prevents the square channels from outputting 0000, whether from the duty cycle generator, the sweep unit, or the length counter; the effect on triangle/noise/PCM is still unclear
10 May 2011
- 15:4615:46, 10 May 2011 diff hist +700 Talk:APU Frame Counter No edit summary
- 00:4500:45, 10 May 2011 diff hist +462 N Talk:APU Sweep an amusing thing I noticed a while ago - the actual reason why the sweep units in the 2 square channels behave slightly differently
9 May 2011
- 15:3415:34, 9 May 2011 diff hist +9 CPU pinout STR/E44/E45 are better known as OUT0/OUT1/OUT2; also, strobe is OUT, not D0
- 15:2115:21, 9 May 2011 diff hist +720 Talk:CPU pinout located the main side effect of pulling pin 30 high - all readable registers in $4000-$401F go internal, so the joypads stop working
7 May 2011
- 20:3320:33, 7 May 2011 diff hist −123 m Talk:CPU pinout traced enough of it to determine this - if both /RESET and pin 30 are low, then the output drivers for M2 will be disabled and the pin will float
- 19:4519:45, 7 May 2011 diff hist +634 m Talk:CPU pinout figured out the part that goes to M2 - it's merged with /RESET
2 May 2011
- 15:4015:40, 2 May 2011 diff hist +69 m User:Quietust not yet tested, though
- 15:3815:38, 2 May 2011 diff hist −65 m Nintendulator does not use inline assembly anymore
- 15:3815:38, 2 May 2011 diff hist +372 User:Quietust put RP2A03G die analysis findings somewhere convenient
29 April 2011
- 16:4916:49, 29 April 2011 diff hist +37 Talk:CPU pinout No edit summary
- 16:3216:32, 29 April 2011 diff hist +463 File:2a03 map.jpg fully traced every single layer of the RP2A03G - these have also been submitted to visual6502.org for potential simulation
17 April 2011
- 17:2617:26, 17 April 2011 diff hist +781 N Talk:Sunsoft FME-7 ...
2 April 2011
- 01:5001:50, 2 April 2011 diff hist +119 m File:2a03 map.jpg No edit summary
- 01:4801:48, 2 April 2011 diff hist +245 N File:2a03 map.jpg A rough diagram of where everything is physically located on the RP2A03G. The clock divider, not highlighted, is at the far right. The purpose of the large section at the upper right is not known - none of it has any connection to anything else.
30 March 2011
- 15:5215:52, 30 March 2011 diff hist 0 m Talk:CPU pinout No edit summary
- 15:5115:51, 30 March 2011 diff hist +82 m Talk:CPU pinout my mistake - they're all enhancement mode (VCC->gate = source and drain connected), but ones with "thick" gates are effectively resistors when off (where "thicker" == lower resistance)
20 March 2011
- 00:1900:19, 20 March 2011 diff hist +42 Talk:CPU pinout getting better at reading these images, but not quite good enough...
1 March 2011
- 19:4719:47, 1 March 2011 diff hist +262 m Talk:CPU pinout No edit summary
28 February 2011
- 03:0503:05, 28 February 2011 diff hist +148 m Talk:INES Mapper 068 found it
27 February 2011
- 21:5921:59, 27 February 2011 diff hist +452 N Talk:INES Mapper 068 ...what about 1-screen mirroring?
- 16:5316:53, 27 February 2011 diff hist +58 INES Mapper 068 clarify nametable registers - $C000 overrides the lower nametable and $D000 overrides the upper nametable, then mirroring gets done accordingly
- 04:1504:15, 27 February 2011 diff hist +180 N Talk:CPU pinout I think I've figured it out...
- 04:0204:02, 27 February 2011 diff hist +48 File:Apu address.jpg traced out all of the registers, and I've located what W$401A is connected to - triangle wave position (D0-D4) and something I don't recognize (D7)
12 February 2011
- 03:3703:37, 12 February 2011 diff hist 0 m Cartridge connector *ahem*
4 February 2011
- 14:0414:04, 4 February 2011 diff hist +15 m Programming with unofficial opcodes →Combined operations: s/N/Z/
- 13:5613:56, 4 February 2011 diff hist −67 Programming with unofficial opcodes it most definitely does set N - blargg's instr_test-v3 fails if it doesn't
2 February 2011
- 16:1116:11, 2 February 2011 diff hist +194 Myths →Old tutorials: people need to know WHY the gbaguy tutorial is wrong - explicitly point out some of its mistakes
- 16:0616:06, 2 February 2011 diff hist +52 Myths →Mappers: the VRC6 uses 16K/8K/8K banking, and the MMC5 happens to support this mode
31 January 2011
- 17:4417:44, 31 January 2011 diff hist +133 m INES Mapper 119 →Variants
- 17:4217:42, 31 January 2011 diff hist +84 m INES Mapper 192 better comparison
24 January 2011
- 15:3115:31, 24 January 2011 diff hist +122 m File:Apu address.jpg anybody capable of interpreting these images is welcome to figure out how to enable these extra registers...
- 15:2615:26, 24 January 2011 diff hist +509 N File:Apu address.jpg The NES APU's address decoder, generating enables for all reads/writes within $4000-$401F. Of very special note are the 4 signals at the very top for readable registers at $4018 (pulse 0 output on D0-D3 and pulse 1 output on D4-D7), $4019 (triangle outpu
- 00:2900:29, 24 January 2011 diff hist +13 m Talk:APU DMC this too
- 00:1600:16, 24 January 2011 diff hist +88 m Talk:APU Noise No edit summary
23 January 2011
- 17:1017:10, 23 January 2011 diff hist +48 m Talk:APU Frame Counter No edit summary
- 17:0917:09, 23 January 2011 diff hist +512 N Talk:APU Frame Counter Created page with 'The frame counter [http://uxul.org/~noname/chips/cpu-2/no-metal/stitched/final/ on the die] seems to be a 15-bit linear feedback shift register (with taps at the 14th and 15th bi…'
- 05:0005:00, 23 January 2011 diff hist +443 N Talk:APU DMC Created page with 'Similarly to the noise channel, the DPCM channel's frequency counter [http://uxul.org/~noname/chips/cpu-2/no-metal/stitched/final/ on the die] is a '''9-bit linear …'
- 05:0005:00, 23 January 2011 diff hist +5 m Talk:APU Noise No edit summary
- 04:5804:58, 23 January 2011 diff hist +439 N Talk:APU Noise more food for thought
- 03:3003:30, 23 January 2011 diff hist +289 N Talk:APU Length Counter Created page with 'Food for thought: the values in the length counter table [http://uxul.org/~noname/chips/cpu-2/no-metal/stitched/final/ on the die] (bottom of the chip, just left of center), '''o…'
18 January 2011
- 15:4715:47, 18 January 2011 diff hist +330 N File:Palette.jpg Palette RAM as physically implemented within the PPU. Note the incomplete address decoding which results in $10/$14/$18/$1C being mirrors of $00/$04/$08/$0C. Also of note, palette RAM bits are significantly larger than those of OAM (which are believed to
14 January 2011
- 20:4020:40, 14 January 2011 diff hist −52 m NES 2.0 No edit summary
- 04:5204:52, 14 January 2011 diff hist +283 m Talk:NES 2.0 Another random observation, probably too late to be useful
- 01:2701:27, 14 January 2011 diff hist +29 m PPU sprite evaluation some clarifications - if you consider what's in secondary OAM at the time, this makes perfect sense
11 January 2011
- 18:3418:34, 11 January 2011 diff hist −12 m Talk:PPU OAM misrecognized that bit...
- 18:2918:29, 11 January 2011 diff hist +330 m Talk:PPU OAM Another observation
- 18:2318:23, 11 January 2011 diff hist +1,173 N Talk:PPU OAM An observation
2 January 2011
- 02:3802:38, 2 January 2011 diff hist +29 Bandai EPROM mapper what the bits actually mean; also the "unknown" sequence is the "ACK" you send between packets on the 24C02
1 January 2011
- 02:0802:08, 1 January 2011 diff hist +509 INES Mapper 159 however, a few of my ROMs had the wrong mappers on them, so note exactly which ones should use which mapper
- 02:0702:07, 1 January 2011 diff hist +599 INES Mapper 016 managed to successfully implement support for this
30 December 2010
- 14:2514:25, 30 December 2010 diff hist −33 m APU *cough*
20 December 2010
- 17:3417:34, 20 December 2010 diff hist −55 PPU registers no they don't - they are correct
26 November 2010
- 23:5123:51, 26 November 2010 diff hist 0 m TxROM No edit summary
16 November 2010
- 20:1720:17, 16 November 2010 diff hist −78 AxROM CHR?
12 November 2010
- 13:4513:45, 12 November 2010 diff hist 0 m Glossary →0
27 October 2010
- 21:5821:58, 27 October 2010 diff hist +24 m Catch-up link
13 October 2010
- 13:3113:31, 13 October 2010 diff hist +189 Talk:Family Computer Disk System No edit summary
11 February 2010
- 21:2821:28, 11 February 2010 diff hist +2 TFROM see http://kevtris.org/mappers/mmc3/NES_TFROM.html - pad CL2 is connected directly to cart edge pin 15 (which is /IRQ), while CL1 is right next to H and V
5 February 2010
- 18:5218:52, 5 February 2010 diff hist 0 m NES 2.0 →Emulator support: must've been over-tired when I made this edit - it's 0.975, not 0.750
- 18:4918:49, 5 February 2010 diff hist +6 ROM arguably, CD-RW is more like Flash memory where the "page" consists of the entire disk
25 January 2010
- 16:1516:15, 25 January 2010 diff hist 0 m PPU registers nitpick: 1F will turn on grayscale, which probably isn't what you intended
5 January 2010
- 17:1717:17, 5 January 2010 diff hist −7 m NES 2.0 nitpick
- 03:3103:31, 5 January 2010 diff hist −5 m NES 2.0 now has partial support
- 03:3003:30, 5 January 2010 diff hist +309 Talk:NES 2.0 No edit summary
- 01:5801:58, 5 January 2010 diff hist +249 N Talk:NES 2.0 Created page with ':"Kevin Horton reports that Nintendulator supports NES 2.0." No it doesn't - it '''detects''' them (and the mapper interface has room for them), but it doesn't actually read any ...'
- 01:5501:55, 5 January 2010 diff hist +24 NES 2.0 er, my emulator most certainly does NOT support it just yet - it looks for the fields, but it doesn't actually use the values yet
22 June 2009
- 15:4915:49, 22 June 2009 diff hist −1 m FJROM this is wrong - correcting to match FxROM
16 June 2009
- 14:5114:51, 16 June 2009 diff hist +2 m Nintendulator C++ now
- 14:5114:51, 16 June 2009 diff hist −167 m User:Quietust no longer does the IRC thing
- 14:5014:50, 16 June 2009 diff hist −11 m Mapper No edit summary
- 14:4914:49, 16 June 2009 diff hist +26 N Color dream moved Color dream to Color Dreams: *twitch* current
- 14:4914:49, 16 June 2009 diff hist 0 m Color Dreams moved Color dream to Color Dreams: *twitch*
13 June 2009
- 03:5403:54, 13 June 2009 diff hist +209 User talk:Ndwiki No edit summary
11 June 2009
- 15:4715:47, 11 June 2009 diff hist +326 N User talk:Ndwiki suggestion
1 October 2008
- 19:2119:21, 1 October 2008 diff hist +488 Nm Nintendulator fix URL
18 March 2006
- 07:1507:15, 18 March 2006 diff hist +88 N INES Mapper 013 No edit summary
10 March 2006
- 07:2207:22, 10 March 2006 diff hist +455 N Nerdtracker player in NESASM link to both parent and child categories
28 February 2006
- 18:4918:49, 28 February 2006 diff hist +1,507 N .pal No edit summary
- 09:1209:12, 28 February 2006 diff hist +91 Nm INES Mapper 007 INES Mapper 7 moved to INES Mapper 007
- 09:1109:11, 28 February 2006 diff hist +137 Nm INES Mapper 003 INES Mapper 3 moved to INES Mapper 003
- 09:1109:11, 28 February 2006 diff hist +140 Nm INES Mapper 002 INES Mapper 2 moved to INES Mapper 002
- 09:1009:10, 28 February 2006 diff hist +316 Nm INES Mapper 034 INES Mapper 34 moved to INES Mapper 034
- 09:0909:09, 28 February 2006 diff hist +202 N INES Mapper 119 No edit summary